# When accuracy counts; why calculate characteristic impedance to 1% accuracy? It's all about yield. (No Myths Allowed).

IF THE TYPICAL tolerance spec for the impedance of a board is within 10%, why is it important for the calculated accuracy of characteristic impedance to be any better? Why should you care about calculating the characteristic impedance to 1% accuracy? It's all about yield.Of course, manufacturing conditions will cause a variation of line width, dielectric thickness and dielectric constant (Dk), which will broaden the characteristic impedance distribution. The reproducible precision of measuring the characteristic impedance (Zo) will also broaden the distribution. The accuracy of knowing the nominal values for each parameter to reach the target value of Zo will shift the center of the impedance distribution.

Each 1% of accuracy in correctly predicting Zo will mean a 1% improvement in centering the impedance distribution within the target window. If the manufactured distribution has any tail outside the acceptable window, tightening the accuracy of predicting Zo will increase the yield. As acceptable limits shrink to +/-5% variation, accurate prediction of Zo of all cross-section geometries will be even more important.

The only accurate way of predicting Zo is with a 2D field solver. With today's generation of off-the-shelf tools, you don't have to be a rocket scientist to use one. Some are as easy to use as a spreadsheet and are accurate to better than 1%.

At DesignCon in 1999, I presented a paper (available at GigaTest.com) illustrating how to verify the accuracy of field solvers. I showed that the Ansoft SI2D field solver can have an absolute accuracy of better than 1%. Using this tool to compare others, I have verified that the 2D field solver in Hyperlynx (hyperlynx.com) and Polar Instruments (polarinstruments.com) are both accurate to at least 1%.

Traditionally, equations have been used by fabricators to calculate Zo. Many online calculators are available to make this even easier. IPC has published a number of examples and the organization is reviewing a new set of approximations for some geometries. But remember that these formulas are all approximations. Although they look complicated, their complexity is no measure of their accuracy. When accuracy counts, you should never use an approximation; you should use a 2D field solver.

If all you want to calculate is Zo or differential impedance, Polar Instruments' SI6000 is extremely easy to use. With this tool, we can explore not only the first order factors that affect Zo, such as line width, dielectric thickness and Dk, but also the second order features, such as trace thickness, etchback and soldermask.

How will trace thickness affect the characteristic impedance of a microstrip? To first order, it won't, but to second order, a thicker line will slightly increase the capacitance of the line and this will decrease Zo. FIGURE 1 shows the Zo of a nominal 50 [OMEGA] line as the thickness of the trace is varied from 0.0001" to 0.003", comparing the Polar Instruments SI6000 and the commonly used approximation as published by IPC. In this example, the line width is 0.020", dielectric thickness is 0.010" and the bulk Dk is 4.

[FIGURE 1 OMITTED]

Two features are obvious. The IPC prediction in this specific example is not bad. It is accurate to about 5%, which is good for an approximation. Second, the trace thickness has a small impact, of roughly 1 [OMEGA] per mil. This is a good rule of thumb. This also verifies the rough rule of thumb that a 50 [OMEGA] microstrip has a line width to Dk of 2:1.

How will Zo change from a soldermask coating the top surface? To second order, we would expect the capacitance to increase and the impedance to decrease. Using the SI6000, we find Zo decreases by about I [OMEGA]/0.001" of soldermask thickness.

Of course, an essential ingredient to accurate prediction of impedance is the accurate measurement of the Dk of the laminate layers. Bulk material values can be routinely measured to better than 1% accuracy by using TDR and VNA techniques.

DR. ERIC BOGATIN is vice president and CTO at GigaTest Labs (gigatest.com). He is a frequent speaker at the PCB Design Conferences. He can be reached at eric@gigatest.com.

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Author: | Bogatin, Eric |
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Publication: | Printed Circuit Design & Manufacture |

Geographic Code: | 1USA |

Date: | May 1, 2003 |

Words: | 695 |

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