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Digital signal processors have come of age ... and how!

Aaaaarrrrggg!! isn't a new acronym, but a primordial scream of frustration. This was my first reaction in attempting to read the literature dealing with digital signal processors (DSPs). Acronyms abound, and if this isn't your primary field of endeavor, you have a problem. Take this description of a new DSP board introduced by SKY Computers, Inc. (Chelmsford, MA):

"Based on the Analog Devices 2106x SHARC DSP, SHARCpool delivers as much power as 1.44 gigaflops per second for FFT-based applications on a single computer daughtercard."

Or from a CETIA (Cambridge, MA) release:

"CETIA's VME64-compliant PowerEngine CVME 603e features a PowerPC 603e CPU plus two PCI mezzanine card (PMC) sites on a single-slot 6U VME board."

I'm sure these are great products, but I needed some help in the translation. (For what good it will do, a simple glossary explaining some of the shorthand, entitled "HWT - huh? What's that?" is available in the on-line version of this article. Go to JED On-Line at


First, we must realize that it is an analog world out there. The radar pulses that leave a transmitter are analog, as are the reflections from a target. The myriad signals detected by an ESM or sonar receiver are analog, as are the images observed in the optical or infrared regions of the electromagnetic spectrum. But it is in the digital world that all of these analog inputs will be processed.

Converting an analog input to digital form using an analog-to-digital converter (ADC) gives rise to a host of computational, manipulative and presentation benefits. Information that might otherwise be overlooked in an ocean of competing signals and noise can be filtered, integrated, weighted and controlled. By way of analogy, the pure sound of a symphony can be freed from the distractions of noise and the mechanical imperfections of the recording process through the use of digital processing techniques. Digital audio tapes and compact discs produce outstanding reproductions of complex analog signals. Similarly, digital signal processing is the fundamental tool for manipulation of analog inputs in a variety of military applications.

At its heart, digital signal processing is highly numerical and very repetitive. As each new piece of signal data arrives, it must be multiplied, summed and otherwise transformed according to complex formulas. What makes this a technological challenge is the speed requirement. DSP systems must work in real time, capturing and processing information as it happens. If they fall behind, information is lost and the signal gets distorted. The ADC, for instance, must take its signal samples often enough to catch all the relevant fluctuations. If the ADC is too slow, it misses some of the action. Imagine trying to film a football game with a movie camera running at one frame per minute. The film would be incoherent, missing entire plays in the intervals between frames. The DSP, too, must keep pace, churning out calculations as fast as the signal data are received from the ADC. The pace gets progressively more demanding as the signal gets faster. Stereo equipment handles sound signals of up to 20 kHz (the upper limit of human hearing), requiring a DSP to perform hundreds of millions of operations per second. Other signals, such as satellite transmissions, are even faster, reaching up into the gigahertz range.

DSPs differ from microprocessors in a number of ways. Microprocessors are typically built for a range of general-purpose functions and normally run large blocks of software, such as operating systems like Windows. Microprocessors are not often called upon for real-time computation. Usually, they are at liberty to shuffle their workloads around and choose their own courses of action - waiting to finish a printing job, for instance, before responding to a user command. And though microprocessors have some numeric capabilities, they are not fast enough for most DSP applications. Where a microprocessor is well-rounded and versatile, the DSP is a single-minded specialist, racing through a smaller range of functions at lightning speed. The DSP is often used as a type of embedded controller, a processor that, accompanied by all necessary software, is built into a piece of equipment and is dedicated to a single group of tasks. In computer systems, DSPs may be employed as attached processors, assisting a general-purpose host microprocessor.
Table 1. Digital signal processor benchmarked. From Lapsley, P. et
al., Buyer's Guide to DSP Processors, Berkeley Design Technology,
Inc., Fremont, CA, 1995.

Vendor                    Processor            Key

Analog Devices            ADSP-217x            1
                          ADSP-210xx           2
                          ADSP-210xx-C         3

AT&T                      DSP16xx              4
                          DSP32C               5
                          DSP32xx              6

DSP Group                 Oak DSPCore          7
                          Pine DSPCore         8

IBM                       MDSP2780             9

Motorola                  DSP5600x             10
                          DSP561xx             11

NEC                       [micro]PD7701x       12

SGS-Thomson               D950-CORE            13

Texas Instruments         TMS320C2xx           14
                          TMS320C3x            15
                          TMS320C4x            16
                          TMS320C5x            17
                          TMS320C54x           18
                          TMS320C80            19
                          TMS320C80-C          20

Zoran                     ZR                   21

Today's DSP chips will invariably contain a multiplier; on-board random access memory (RAM) for data storage; and read-only memory (ROM) for fixed-coefficient storage. They may also contain on-board ADCs and digital-to-analog converters. Newer generations of DSP chips may contain parallel or pipelined structures to maximize throughput. These chips are optimized for fast, efficient implementation of the digital manipulations required for processing of real-world sensor inputs in real time.

To summarize, DSP chips differ from microprocessors in several significant manners:

1) performance for such signal-processing algorithms as fast Fourier transforms, digital filtering, pattern matching and image transforms are 10-100 times faster than the performance of complex instruction set computers (CISCs)

2) power consumption, e.g., millions of floating point operations per second (MFLOPS) per watt, an important military consideration, is less in the DSP chip

3) processing per unit area of board space, another critical military driver in space-constrained applications, attains 20-50 MFLOPS per [in..sup.2] of board space in current-generation chips; this exceeds the capacity of popular reduced instruction set computers (RISCs) and CISCs by 10-50 times

4) the basic cost of signal processing, MFLOPS per dollar, is considerably lower than that of comparable microprocessors.

Just a decade-and-a-half ago, digital signal processing was more theory than practice. The only systems capable of doing signal processing were massive mainframes and super-computers, and even then much of the processing was done not in real time but off-line in batches. The first practical real-time DSP systems appeared on the scene in the late 1970s. Today, the leading producer of DSP chips is Texas Instruments. Other DSP manufacturers include AT&T, Motorola, Analog Devices and DSP Group.

Any discussion of digital signal processing would be incomplete without some reference to the fast Fourier transform (FFT). During the race into space in the 1960s, digital computers experienced explosive growth. One application of signal processing was in the area of spectral analysis using the discrete Fourier transform (DFT). The DFT inputs a set of discrete samples in the time domain and transforms them into information in the frequency domain. Unfortunately, because of its extensive mathematical demands, the DFT formula was not applicable to digital computer data processing. In 1965, Cooley and Tukey published their algorithm for efficiently computing the FFT and gave birth to the era of modern spectral analysis.[1]


There is a real temptation to attempt to rank DSPs by some sort of speed metrics, the alacrity with which they accomplish a given task, and thereby rank the available chips. This has spawned a plethora of benchmarks and test suites. A number of different DSP performance metrics have been proposed over the years.

A common specification of processor performance is the MIPS (millions of instructions per second) rating. MIPS refers to the average number of machine language instructions that a processor can perform in one second. Unfortunately, MIPS only measures the performance of the processor, without regard to subsystems such as input and output (I/O). The selection and interconnection of peripheral devices are ignored, and the results of tests can be grossly misleading. Thus, the same instructions on different processors may accomplish different amounts of work, so a 40-MIPS processor might actually be faster than a 50-MIPS processor. The situation has been summed up by wags who refer to MIPS as "Meaningless Indicator of Processor Speed."

Millions of operations per second (MOPS) and millions of floating-point operations per second (MFLOPS) are other popular performance metrics. Floating-point operations are those in which numerical quantities are represented by a mantissa and exponent. Unfortunately, one person's definition of an "operation" may be quite different from another's, resulting in inflated MOPS or MFLOPS figures. Since multiply-accumulate operations are at the heart of many DSP algorithms, MACS (multiply-accumulates per second) is another DSP performance measure. However, most modern DSPs perform one multiply-accumulate per instruction cycle, so this figure is usually identical to the processor's MIPS rating.

To be realistic, benchmark testing should occur at the application level. Here, a particular suite of operations - mathematical and logical - is entered. These applications are exercised, results are generated and output exported to an appropriate device. Unfortunately, this approach suffers from serious problems. First, most of these applications are not well specified. For example, two modems may be V.34 compliant, but one might do a better job than the other in the presence of a noisy line, requiring considerably more processing power. Second, these applications are large - so large that it is unrealistic to expect to implement them on a variety of DSPs in a reasonable amount of time. Finally, the skills of the implementors may have a large impact on the processor's performance in the application. Benchmarks resulting from this approach include Whetstones (both single and double precision) and Dhrystones, Linpack, Xmark, Graphstones, Khornerstones, Stanford Floating-Point, Stanford Integer, Stanford Recursion, Disk WinMark, DOSmark, DOS Video, Graphics WinMark, Win-Bench and on and on. Added to this list is a deluge of proprietary tests promulgated with the intention of demonstrating the superiority of the products of a particular manufacturer.

One approach to bring order to this chaos was the establishment of the Standard Performance Evaluation Corporation (SPEC) in 1988. SPEC is a nonprofit corporation formed to establish, maintain and endorse a standardized set of relevant benchmarks that can be applied to the newest generation of high-performance computers. The founders of this organization, located in Fairfax, VA, believe that the user community will benefit greatly from an objective series of application-oriented tests that can serve as common reference points.

SPEC members consist of companies involved in the manufacture and evaluation of processors. SPEC associate members include a variety of academic and military constituents. SPEC develops suites of benchmarks for measuring processor performance and publishes reports of news and benchmark test results. The SPEC benchmark suites are packaged with source code and tools. They are tested extensively for portability before being released to the public.

The SPEC benchmark suites are specifically designed to measure the performance of CPUs and run only under Unix. Speed results, called "SPEC ratios," are expressed as the ratio of time required to execute the benchmark compared to a reference time, which is the execution time on a Digital Equipment VAX 11/780 computer.

A benchmarking middle ground for the comparison of a wide range of programmable DSP chips has been developed by Berkeley Design Technology, Inc. (Fremont, CA).[2] Positioned between the extremes of counting instructions and timing applications, the Berkeley Design Technology, Inc. (BDT) approach measures algorithm kernels. An algorithm kernel is the heart of an algorithm (e.g., an impulse response filter, a convolutional encoder or a finite-state machine). Algorithm kernels have some compelling advantages as benchmarks, including relevance, ease of specification, ease of optimization and ease of implementation. For these reasons, BDT chose the approach for benchmarking efforts.

The processors benchmarked in BDT's study are listed in Table 1. These processors represented some of the most interesting, powerful and relevant DSPs currently in the field. Both fixed- and floating-point processors were included, and benchmarks were implemented using each processor's native arithmetic type and did not directly address precision issues. The algorithm kernels were used as benchmarks. These included classical signal-processing algorithms, such as filters, FFTs and vector processing. They also included two other functions that DSPs are increasingly being called upon to perform: convolutional encoding (for error-correction coding) and a finite-state machine. The finite-state machine represents a contrived set of operations typical of control and decision processing, including branches, bit manipulation and if-then-else statements.

The detailed results of the benchmarking are treated fully in Reference 2. As an example, Figure 1 shows the execution time for the 256-point FFT benchmark for each of the benchmarked processors. As can be seen in the figure, the execution times for the different DSPs range over almost an order of magnitude.

The primary lesson to be learned from these benchmarks is that there is no single best processor. The best processor depends on the application. The most that can be said is that there may be a number of strong candidates for a particular application. Therefore, processors must be evaluated in the light of a specific application.


There are innumerable examples of the use of DSPs in military systems. Broadly, these uses include airborne Doppler radar and moving target indicators; target recognition using signature analysis of radar reflections; and both active and passive sonar signature analysis. With sonar networks, the real-world inputs from arrays of hundreds of hydrophones monitoring vast underwater domains would literally swamp processors with less agile computational throughputs. In addition, DSP uses extend to telecommunications, speech processing and synthesis, acoustic homing weapons, satellite and terrestrial imagery and a host of other "high technology" operations.

Advanced DSP hardware and software supplied by Applied Signal Technology, Inc. (Sunnyvale, CA) will soon be appearing in the Joint SIGINT Avionics Family Lowband Subsystem as a result of a subcontract received from Sanders, a Lockheed Martin Company. Four units will be designed, built and integrated aboard four different airframes to demonstrate compliance with the new Joint Airborne SIGINT Architecture standards. The system will provide SIGINT and geolocation capabilities.

CETIA, Inc. (Cambridge, MA), a subsidiary of the Thomson Corp. of America, has found a niche in the VME world by dedicating its product line to single-board computers (SBCs) based exclusively upon the use of the IBM PowerPC [R] CPUs rather than DSPs. CETIA's new CPMC-ATM module was purchased by Thomson Marconi Sonar Pty. of Australia for the development of real-time sensor systems for the Australian Navy.

CETIA's fourth-generation SBC PowerPC board, the PowerEngine 4 series, is available with single or dual 200-MHz or 266-MHz PowerPC 604e processors on 6U VME cards. An innovative thermal drain, the Ruggedizer, extends the thermal and mechanical operating range of the original COTS hardware without the need for a redesign. Ruggedizers use 3-D laser scanning to generate the top-side topology of a board. A negative of the topography is produced in a precision-milled aluminum plate to produce a custom-fit heat sink. A thermally conductive paste provides the heat path from the board to the heat sink. The extremely rigorous mechanical tolerances and high thermal dissipation capacity result in gains of as much as 20 [degrees] C in the upper thermal operational limit.

A new VME receiver, the R-3000, features frequency coverage from 20 to 2,800 MHz using two plug-in modules on a 6U board. The R-3000, a product of Eclipse Electronic Systems, Inc. (Richardson, TX), is designed to be used in embedded signal-collection systems. Each RF module contains a double-conversion superhet receiver followed by DSP processing of the I and Q outputs.

The key to many real-time receiving systems is computational horsepower. The wider the bandwidth of the ADC digitizing the signals, the more signal that must be processed. The more advanced the modulation type and communications protocol, the more computing power is needed. Dedicated digital signal processing modules are designed to provide that power. The Hewlett-Packard (Lake Stevens Division, Lake Stevens, WA) SCMVX008 is an example of such a processing module. This VXI-based module contains two 60-MHz Texas Instruments TMS320C40 DSPs. The "C40" was selected as the heart of the module because of its ability to work in a networked environment and the availability of a large, mature set of tools already in place.

The SCMVX008 makes its appearance in the Hewlett-Packard HP E3238S Scanning Signal Analysis System, also known as the "Blackbird" [ILLUSTRATION FOR FIGURE 2 OMITTED]. The E3238S finds application in fast, high-resolution spectrum observation, signal surveillance and signal identification and classification. The unit covers a range of 2 to 2,650 MHz at a sweep rate of 1.1 GHz/sec.

An airborne electronic intelligence (ELINT)-based system for the identification of radar signals was recently demonstrated by Mantech Real-Time Laboratories of Sarasota, FL. Mantech was tasked with building a proof-of-concept system that would use COTS components and meet a six-month development cycle. The system consisted of a ruggedized 3/4 ATR enclosure, a VME backplane, a RISC-based host controller and two DSP boards.

The DSP portion of the system used one quad and one octal SHARC board from Ixthos, Inc. (Leesburg, VA). The Ixthos octal board places eight SHARC DSPs on a single 6U VME board. When operating at a 40-MHz clock rate, each of the DSPs can execute up to 120 MFLOPS and perform a 512-point real FFT in 136 [micro]sec.

Twelve SHARC processors on three quad boards from Ixthos, Inc. [ILLUSTRATION FOR FIGURE 3 OMITTED] are also playing an important role in a sonobuoy simulator produced by Flightline Electronics (Fishers, NY) and CRT Corp. (Rockville, MD) for the Naval Air Warfare Center Aircraft Division at Patuxent River, MD. The Acoustic Signal Generation System (ASGS) simulates the outputs of the AN/UYS-1, an eight-channel sonobuoy receiver used on US Navy aircraft for testing, training and research and development.

The ASGS models three major elements - sonobuoys, targets and the ocean environment. It can model each sonobuoy in either a passive or active mode of detection from a large set of operator-defined parameters. Three targets - submarines, torpedoes or surface ships - may be simulated at one time with the sound propagation adjusted for sea state, temperature/depth profile, bottom type (rock, sand or mud) and environmental and distant shipping noise. Every second, the ASGS updates the position of all targets and sonobuoys and calculates propagation losses and signature arrival times.

Mercury Computer Systems of Chelmsford, MA, has been very active in the field of DSP-based video products. Its BattleReady COTS[TM] products are found in the sensor payloads on board the Tier II (Predator), Tier II+ (Global Hawk) and Tier III- (Dark-star) unmanned aerial vehicles. The real-time processing ability of DSPs permits a host of video processing applications, such as image enhancement, input-output format conversion, color correction and compression and decompression.

Not all DSPs that serve the military are destined for reuse. A DSP-based multiprocessor SBC produced by Mizar, Inc. (Dallas, TX) will be used in a next-generation US Navy lightweight torpedo, the Light Hybrid Torpedo (LHT). Mizar will supply the SBCs to Hughes Aircraft Corporation, Weapons Systems Segment, Naval & Maritime Systems (Hughes, in turn, is a subcontractor to Alliant Techsystems, Inc., which serves as the prime contractor on this program). Additionally, Mizar's DSP-based multiprocessor will be utilized in the heavyweight torpedo program upgrade to the Mk48 Advanced Capability (ADCAP) Common Torpedo-Development Vehicle (COT-DV). Hughes is the prime contractor on the COT-DV program. Both programs advance the concept of using affordable common torpedo subsystems for multiple undersea missions.

These applications use Mizar's Octal "C40" boards based upon the Texas Instruments TMS320C40 programmable floating-point DSP. The single-board computers have been ruggedized for the torpedo application and are designed to address the US Navy's demanding torpedo environmental requirements, including significant structural shock loads which may reach 400 g's.

The Applied Physics Laboratory of Johns Hopkins University has long been developing radar systems for missile tracking. One of these projects involves the design and development of a missile-like pod, nicknamed the Captive Seeker, that is mounted on the wing of a Learjet [ILLUSTRATION FOR FIGURE 4 OMITTED]. The pod's mission is to collect radar data and perform real-time signal analysis to seek, locate and track a target. Recently, the utility of the Captive Seeker was enhanced by incorporating multimode pointing improvements to the previously manually pointed antenna system and utilizing Global Positioning System (GPS) and real-time processing and analysis of the received radar signal.

The current Captive Seeker system possesses considerable real-time processing capability in its cabin-mounted VME rack. The rack contains high-speed DSPs controlled by general-purpose controllers that process the signal to aid in real-time analysis and antenna pointing.

Signal processing is performed by a Pentek, Inc. (Upper Saddle River, NJ) 4284 Single "C40" DSP processor and a 4270 Quad "C40" DSP processor. The first "C40" performs a 1-K FFT and sends the data back to the host for quick display. The next two "C40s" perform 4-K FFTs and zoom in on 256-sample segments of the frequency spectrum to provide high-resolution displays. The last "C40" computes azimuth and elevation angle errors and implements the tracking algorithm. Software developed at the Applied Physics Laboratory calculates and displays in real time the received signal spectrum, monopulse angle errors versus frequency, the measured sea or land reflectivity, the average clutter value and other useful information.

Perhaps one might think that an instrumentation-recording system is not a potential site of a DSP application. This was my notion, and it was proven wrong. DSPCon, Inc. (Bridgewater, NJ), specializing in DSP support for real-time processing, and DRS Precision Echo, Inc. (Santa Clara, CA), a leading supplier of recording systems for both the aerospace and defense industries for almost 40 years, have jointly developed a high-rate ([greater than]10 MB/sec) flexible recording system. The system marries DSPCon's System 2000 data acquisition software and hardware with Precision Echo's DTF and ID-1 products. The result of this marriage, the MTG-100, is a customer-defined, customer-sustainable and customer-expandable system based upon COTS components [ILLUSTRATION FOR FIGURE 5 OMITTED].

One result of the very high costs associated with developing a new recording drive is the trend toward the use of standardized drives, media and data formats. While a proprietary system can generally achieve the highest acquisition rates, there are several negatives associated with this approach. What appears to be lacking are recorder front ends with open design interfaces. Simply put, one manufacturer's boards cannot fit into another's front-end. Not surprisingly, DSPs provide the solution in the MTG-100 by performing double duty as processing front and back ends.

The heart of the system is the file transfer language, or FTL, software that resides on the DSP board and in the host computer. The FTL is an efficient multitasking, multiprocessor software that provides the interface between I/O hardware, the Ethernet and SCSI-(small computer system interface) connected devices. The FTL provides for real-time data streaming to and from the recorder as well as real-time monitoring, pre- and post-processing and networked host control.

Signal- and image-processing applications demand abundant, raw computing power, and this is delivered by the SHARCpool, a series of SHARC processor daughtercards produced by SKY Computers, Inc. (Chelmsford, MA). Introduced in March 1997, each daughtercard consists of 12 Analog Devices 2106x (SHARC) DSPs. The basic daughtercard configured to a 6U motherboard can deliver 1.44 GFLOPS of processing performance. Four SHARCpools can be configured on a 9U board to produce 5.76-GFLOPS performance. The daughtercards interface to the motherboard via the proprietary SKYchannel packet bus, which provides 320-MB/sec I/O performance. Scalable multiprocessing delivers up to 12,288 processors on 256 boards.

Flexibility and interoperability are the hallmarks of a COTS DSP-based digital radio receiver system produced by Spectrum Signal Processing (Burnaby, BC, Canada). The modular receiver consists of Spectrum's C44-based receiver/DSP block, the MDC44DDC, and the MD70MAI ADC [ILLUSTRATION FOR FIGURE 6 OMITTED]. These building blocks are combined using Parallel C, a powerful multiprocessing toolset from 3L Ltd. (Edinburgh, Scotland). The result is a system that can be used in single- and multiple-signal applications while maintaining interoperability with VXI, ISA, PCI and VME platforms. In December 1996 Spectrum delivered 300 digital receiver modules, 250 VME-based boards and a variety of other module-based products to the US DOD for use in advanced-development military and [C.sup.3]I systems.

The latest Spectrum Signal Processing product, to be available for September 1997 deliveries, is the CV8 TMS320C4X. This octal configuration of 60-MHz Texas Instruments TMS320C4x DSPs, carried by a VME 6U Master Board, delivers up to 480 MFLOPS over a VME64 master/slave interface.


Lest the reader be deluded into thinking that DSPs are used only in the realm of esoteric military applications, we hasten to add that DSPs are quickly becoming as ubiquitous as the transistor was in the 1950s and 60s. You may already have them in your home, at work or in your car. And be assured that the little rover, Sojourner, carried to Mars by Pathfinder and now scurrying about on the fourth rock from the sun, has its share of DSPs.

Digital signal processing is one of the brightest spots in the semiconductor business today, and one of the few deserving the title "breakthrough." Like earlier advances in microprocessors and computer memories, digital signal processing is a foundation technology with the power to transform broad areas of the electronics industry. In the next few years, digital signal processing will give rise to hundreds of new products and change what people expect from technology.


1. Cooley, J.W. and J.W. Tukey, "An Algorithm for the Machine Calculation of Complex Fourier Series," Math. Computations, Apr. 1965, pp. 297-301.

2. Lapsley, P. et al., Buyer's Guide to DSP Processors, Berkeley Design Technology, Inc., Fremont, CA, 1995.
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Author:Herskovitz, Don
Publication:Journal of Electronic Defense
Date:Aug 1, 1997
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