Printer Friendly

Browse Programmable logic arrays topic

Usage subtopic

Articles

1-72 out of 72 article(s)
Title Author Type Date Words
A Post-training Quantization Method for the Design of Fixed-Point-Based FPGA/ASIC Hardware Accelerators for LSTM/GRU Algorithms. Rapuano, Emilio; Pacini, Tommaso; Fanucci, Luca May 11, 2022 8312
The Use of Internet of Things and Cloud Computing Technology in the Performance Appraisal Management of Innovation Capability of University Scientific Research Team. Meng, Siyu; Zhang, Xue Apr 10, 2022 9077
Automatic Arrhythmia Detection Based on the Probabilistic Neural Network with FPGA Implementation. Srivastava, Rohini; Kumar, Basant; Alenezi, Fayadh; Alhudhaif, Adi; Althubiti, Sara A.; Polat, Kemal Report Mar 22, 2022 4936
FPGA Delay-Oriented Process Mapping Algorithm of Xiangxi Minority Based on LUT. Xiao, Yun; Zeng, Wei; Zhang, Huang Report Feb 7, 2022 7785
Reduction in Total Harmonic Distortion in Induction Motor Drives with High-Performance FPGA Controller. Sumam, Mukalil Jacob; Shiny, Gopinathan Report Feb 1, 2022 4729
FPGA-based Acceleration for Convolutional Neural Networks on PYNQ-Z2. Huynh, Thang Viet Jan 1, 2022 4602
FPGA Realization of Spherical Chaotic System with Application in Image Transmission. Nuñez-Perez, Jose Cruz; Adeyemi, Vincent Ademola; Sandoval-Ibarra, Yuma; Pérez-Pinal, F. Javier; Tle Report Jan 1, 2021 8468
Hardware Enabled Acceleration of Near-Field Coded Aperture Radar Physical Model for Millimetre-Wave Computational Imaging. Sharma, Rahul; Yurduseven, Okan; Deka, Bhabesh; Fusco, Vincent Report Jan 1, 2021 9161
Accelerating Binary String Comparisons with a Scalable, Streaming-Based System Architecture Based on FPGAs. Pilz, Sarah; Porrmann, Florian; Kaiser, Martin; Hagemeyer, Jens; Hogan, James M.; Ruckert, Ulrich Report Feb 1, 2020 9335
A Magnetometer-Only Attitude Determination Strategy for Small Satellites: Design of the Algorithm and Hardware-in-the-Loop Testing. Carletta, Stefano; Teofilatto, Paolo; Farissi, M. Salim Technical report Jan 1, 2020 7950
SIFO: Secure Computational Infrastructure Using FPGA Overlays. Fang, Xin; Ioannidis, Stratis; Leese, Miriam Dec 31, 2019 13186
Design and Simulation of 64 Bit FPGA Based Arithmetic Logic Unit. Bedir, Nuray Saglam; Kacar, Firat Report Dec 1, 2019 4095
Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise--Designing a Computer Architecture via HLS). Giorgi, Roberto; Khalili, Farnam; Procaccini, Marco Nov 30, 2019 10208
An FPGA-Based Hardware Accelerator for CNNs Using On-Chip Memories Only: Design and Benchmarking with Intel Movidius Neural Compute Stick. Dinelli, Gianmarco; Meoni, Gabriele; Rapuano, Emilio; Benelli, Gionata; Fanucci, Luca Nov 30, 2019 8479
Emulator Based on Switching Functions for a Dual Interleaved Buck-Boost Converter. Vazquez, Marco Antonio Sanchez; Araujo-Vargas, Ismael; Cano-Pulido, Kevin Aug 31, 2019 4456
Compiler Optimization on Instruction Scheduling for a Specialized Real-Time Floating Point Soft-Core Processor. Kirchhoff, Michael; Wagner, Lothar; Fengler, Wolfgang Aug 1, 2019 9755
FPGA Based Low Cost Automatic Test Equipment for Digital Circuits. Bayrakci, Alp Arslan Report Jun 1, 2019 3630
A Novel Hardware Systolic Architecture of a Self-Organizing Map Neural Network. Khalifa, Khaled Ben; Blaiech, Ahmed Ghazi; Bedoui, Mohamed Hedi Apr 30, 2019 9062
An FPGA-Based Hardware Accelerator for CNNs Using On-Chip Memories Only: Design and Benchmarking with Intel Movidius Neural Compute Stick. Dinelli, Gianmarco; Meoni, Gabriele; Rapuano, Emilio; Benelli, Gionata; Fanucci, Luca Jan 1, 2019 7705
Zero-Knowledge Realization of Software-Defined Gateway in Fog Computing. Lin, Te-Yuan; Fuh, Chiou-Shann Report Dec 1, 2018 5176
Optimizing FDTD Memory Bandwidth by Using Block Float-Point Arithmetic. Pijetlovic, Stefan; Subotic, Milos; Pjevalica, Nebojsa Report Aug 1, 2018 5016
Hardware Efficient Reciprocal Using Second Order Harmonized Parabolic Synthesis and Squaring Shrunk Method. Luo, Jun; Luo, Hongwei; Zhi, Yue; Wang, Xiaoqiang; Lv, Hongfeng; Dang, Ming Report Apr 1, 2018 5188
Transient and Permanent Adaptive Fault Classifier for FPGA Applications in the Space. Tawfeek, Radwa M.; Alkabani, Yousra; Egila, Mohamed G.; Hafez, I.M. Report Mar 1, 2018 5315
Algorithm and Architecture Optimization for 2D Discrete Fourier Transforms with Simultaneous Edge Artifact Removal. Mahmood, Faisal; Toots, Mart; Ofverstedt, Lars-Goran; Skoglund, Ulf Jan 1, 2018 9357
FPGA Implementation of UFMC Based Baseband Transmitter: Case Study for LTE 10MHz Channelization. Jafri, Atif Raza; Majid, Javaria; Zhang, Lei; Imran, Muhammad Ali; Najam-ul- Islam, M. Jan 1, 2018 7161
Embedded FPGA Design for Optimal Pixel Adjustment Process of Image Steganography. Huang, Chiung-Wei; Chou, Changmin; Chiu, Yu-Che; Chang, Cheng-Yuan Jan 1, 2018 4472
FPGA based speech recognition using dynamic MFCC. Virgin, A. Joe; Nidhyananthan, S. Selva Report Jun 1, 2017 2726
Three level boosting power factor correction for Bldc motor using field programmable gate array. Ramakrishnan, Velmurugan; Krishnan, Mahadevan; Iruthayaraj, Gerald Christopher Raj Report May 1, 2017 2232
SPIMN Stateful Packet Inspection for Multi Gigabits Networks. Ibrahim, Amr Report May 1, 2017 5234
Efficient FPGA implementation of high-throughput mixed radix multipath delay commutator FFT processor for MIMO-OFDM. Dali, Mohammed; Guessoum, Abderezak; Gibson, Ryan M.; Amira, Abbes; Ramzan, Naeem Report Feb 1, 2017 10586
Efficient Realization of BCD Multipliers Using FPGAs. Gao, Shuli; Khalili, Dhamin Al-; Langlois, J.M. Pierre; Chabini, Noureddine Jan 1, 2017 5902
Real-Time Control System for Improved Precision and Throughput in an Ultrafast Carbon Fiber Placement Robot Using a SoC FPGA Extended Processing Platform. Ochoa-Ruiz, Gilberto; Bevan, Romain; de Lamotte, Florent; Diguet, Jean-Philippe; Bao, Cheng-Cong Jan 1, 2017 13347
A High-Level Synthesis Scheduling and Binding Heuristic for FPGA Fault Tolerance. Wilson, David; Shastri, Aniruddha; Stitt, Greg Report Jan 1, 2017 12400
Design Considerations When Accelerating an FPGA-Based Digital Microphone Array for Sound-Source Localization. Silva, Bruno da; Braeken, An; Steenhaut, Kris; Touhafi, Abdellah Jan 1, 2017 11770
Dynamical Analysis and FPGA Implementation of a Novel Hyperchaotic System and Its Synchronization Using Adaptive Sliding Mode Control and Genetically Optimized PID Control. Rajagopal, Karthikeyan; Guessas, Laarem; Vaidyanathan, Sundarapandian; Karthikeyan, Anitha; Srinivas Report Jan 1, 2017 6240
DESIGN AND DEVELOPMENT OF A PROGRAMMABLE LOGIC CONTROLLER BASED INDUSTRIAL ROBOT FOR SORTING ITEM BOXES. Report Aug 31, 2016 3328
The Vision Show brings FPGAs into focus. Nelson, Rick Jul 1, 2016 818
FPGA implementation of target tracking algorithm for wireless sensor node. A., Annie Femena; C., Thiruvenkataesan Jun 15, 2016 2198
Implementation of duplicate TRNG on FPGA by using two different randomness source. Tuncer, Taner Report Aug 1, 2015 4069
FPGA based switching noise reduction technique for multiple input DC to DC converter using sigma delta modulation. Sasi, G.; Rajamani, V. Report Jul 1, 2015 4746
Design of fast adders with optimal placement and routing in FPGAs using muxed AOI logic. Premalatha, B.; Umamaheswari, S. Report Jun 15, 2015 3895
FPGA-Based MWD for Network Error Correction. El-Medany, Wael M. Report May 1, 2015 2966
FPGA-Based MWD for Network Error Correction. El-Medany, Wael M. May 1, 2015 2966
Simulation and implementation of active neutral point clamped multilevel inverter powered by PV source. Sankar, A. Bharathi; Seyezhai, R. Report Dec 1, 2014 2338
Runtime bitstream relocation based intrinsic evolvable system. Kaifeng Zhang, Huanzhang Lu, Shanzhu Xiao, Weidong Hu Report Jun 1, 2014 4711
An evolvable driver for a non-linear damped pendulum. Delai, A.; Bravo, I.; de Oliveira, J.R.; Garcia, J.C.; Olivares, J. Report Mar 1, 2014 4175
Stego on FPGA: an IWT approach. Ramalingam, Balakrishnan; Amirtharajan, Rengarajan; Rayappan, John Bosco Balaguru Report Jan 1, 2014 3867
Enhanced temperature control method using ANFIS with FPGA. Huang, Chiung-Wei; Pan, Shing-Tai; Zhou, Jun-Tin; Chang, Cheng-Yuan Report Jan 1, 2014 3623
Empirical mode decomposition and neural networks on FPGA for fault diagnosis in induction motors. Camarena-Martinez, David; Valtierra-Rodriguez, Martin; Garcia-Perez, Arturo; Osornio-Rios, Roque Alf Report Jan 1, 2014 8243
Synchronous current compensator for a self-balanced three-level neutral point clamped inverter. Krishna, Remya; Soman, Deepak E.; Kottayil, Sasi K.; Leijon, Mats Report Jan 1, 2014 3744
An improved toeplitz measurement matrix for compressive sensing. Su, Xu; Hongpeng, Yin; Yi, Chai; Yushu, Xiong; Xue, Tan Report Jan 1, 2014 4320
FPGA-based implementation of all-digital QPSK carrier recovery loop combining costas loop and maximum likelihood frequency estimator. Wang, Kaiyu; Song, Zhiming; Qi, Xianwei; Yan, Qingxin; Tang, Zhenan Jan 1, 2014 8682
Hardware-efficient design of real-time profile shape matching stereo vision algorithm on FPGA. Tippetts, Beau; Lee, Dah Jye; Lillywhite, Kirt; Archibald, James K. Jan 1, 2014 7924
Novel receiver architecture for LTE-A downlink physical control format indicator channel with diversity. Abbas, S. Syed Ameer; Thiruvengadam, S.J.; Susithra, S. Jan 1, 2014 5818
An implement of FPGA based PCI controller device and improvement of DDA arc interpolation. Zhang, Zhengjie; Yu, Zhandong Report Jan 1, 2014 4527
Backstepping control of induction motor using Xilinx System Generator: FPGA based implementation. Sghaier, Narjess; Ramzi, Trabelsi; Gdaim, Sofiene; Bossoufi, Badre; Mimouni, Fouzi Mohamed Report Sep 1, 2013 2407
Image filtering with field programmable gate array/Vaizdu filtravimas lauku programuojama logine matrica. Slenderis, Arunas; Daunys, Gintautas Report Apr 1, 2013 1723
FPGA-based implementation of Lithuanian isolated word recognition algorithm/Lietuviu kalbos pavieniu zodziu atpazinimo algoritmo igyvendinimas lauku programuojama logine matrica. Sledevic, Tomyslav; Stasionis, Liudas Report Apr 1, 2013 1954
Resource efficient hardware architecture for fast computation of running max/min filters. Torres-Huitzil, Cesar Report Jan 1, 2013 4763
Rainbow: an operating system for software-hardware multitasking on dynamically partially reconfigurable FPGAs. Jozwik, Krzysztof; Honda, Shinya; Edahiro, Masato; Tomiyama, Hiroyuki; Takada, Hiroaki Jan 1, 2013 28625
FPGA control implementation of a grid-connected current-controlled voltage-source inverter. Ekstrom, Rickard; Leijon, Mats Report Jan 1, 2013 5714
A generic three-sided rearrangeable switching network for polygonal FPGA design. Yen, Mao-Hsu; Yu, Chu; Liao, Horng-Ru; Hsieh, Chin-Fa Report Jan 1, 2013 11075
Hardware-software co-design for reconfigurable field programmable gate arrays using mixed-integer programming. Ali, Faridah M.; Hamadi, Helal Al-; Ghoniem, Ahmed; Sherali, Hanif D. Report Sep 1, 2012 6132
FPGA based Walsh and inverse Walsh transforms for signal processing. Zulfikar; Abbasi, Shuja A.; Alamoud, A.R.M. Report Aug 1, 2012 3488
The politics of table saws. Nelson, Rick Editorial Nov 1, 2011 620
Software-defined instrumentation with peer-to-peer computing. Friedman, Matthew May 1, 2011 1304
A real-time histogram equalization system with automatic gain control using FPGA. Cho, Junguk; Jin, Seunghun; Kwon, Key Ho; Jeon, Jae Wook Report Aug 1, 2010 5844
Autonomous mobile device controlled by on-chip network of intelligent sensors for indoor environment navigation/Autonominis mobilus itaisas, valdomas naudojant intelektualiuju jutikliu tinkla. Tanase, Cr. A.; Graur, A.; Gaitan, V.G.; Popa, V. Report Jun 1, 2009 2123
Data acquisition addresses multifaceted applications. Lecklider, Tom Sep 1, 2008 3240
FPGA based multiprocessor core for processing of sensor signals. Kamat, Rajanish K.; Shinde, Santosh A.; Shelake, Vinod G. Report Apr 1, 2008 897
A novel hardware architecture for an embedded stereo vision sensor. Ambrosch, Kristian; Humenberger, Martin; Kubinger, Wilfried Report Jan 1, 2007 1697
HD Digital Video, Telecom and IP OEMs to Benefit from New Scaleable Twin DSP and FPGA Based Development System. Nov 2, 2006 655

Terms of use | Privacy policy | Copyright © 2022 Farlex, Inc. | Feedback | For webmasters |