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Supercomputers on the factory floor.

The Flavors' Parallel Inference Machine (PIM) system is the first plant floor controller with the architecture of a supercomputer, offering real-time predictability and a programming environment designed for massive applications in control and automation. The PIM is designed to exploit the parallelism inherent in most automation applications. It delivers real-time, high performance by applying massive computer power in a controller architecture design.

The PIM is programmed in Flavors' realtime control Paracell language. With Paracell, automation and control specialists use English language statements to program complex problems in days instead of weeks.

Unlike general-purpose real-time computers that are event or interrupt driven, the PIM has a constant and fixed execution cycle, which runs constantly in dedicated hardware. The PIM maintains a constant "snapshot" of the application through a dual-ported memory that is tied directly to the real-time I/O. Sixty times a second, the user program reads the "state of the world" from memory, recalculates the required new state, and then updates the memory and indirectly the I/O. Because of this unique architecture, the PIM can execute extremely large Paracell applications with predictable performance, independent of the program size or I/O load.

PIM systems are expandable and comprised of four board types: a single system manager "BOSS" board, multi-processor boards, I/O boards, and memory boards. A minimum PIM has one BOSS and one multi-processor board. A maximum PIM can have a combination of 40 boards.

Processor boards hold four Motorola 68030 user-processors, each with a floating point accelerator, 4 Mb of program memory, and a special-purpose processor that ensures all user processors have a common view of and simultaneous access to the PIM data memory. PIM global memory resides on the BOSS, I/O, and memory boards. All global memory is smart memory. Each of these boards include logic that supports powerful operations. These single memory cycle operations support critical real-time functions directly through Paracell.

A basic PIM system, including one processor board, one BOSS board, a programming workstation, and all software licenses, is priced at $250,000. A maximum PIM can handle up to 40 boards and can be configured with up to 32 multi-processor boards. A larger high-end PIM system, consisting of 20 processor boards, 512 Mb of data memory, four I/O boards, is priced at approximately $2 million.

The PIM is an attached server that runs Paracell applications in a peer-to-peer configuration with applications running on general-purpose computers. PIM systems attach to general-purpose computers through a shared memory interface. Interfaces are available for computer systems from Digital Equipment Corp, Gould, Modular Computer Systems, Sun Microsystems, Symbolics, and Texas Instruments. I/O communications to and from the PIM are directed to memory through remote I/O networks, a proprietary high-speed parallel interface; or indirect through standard networks such as MAP or DECnet.

The PIM is designed for deployed applications and includes standard battery backup, a transformer-based power supply capable of surviving significant power transients, circuit-board cooling to improve component reliability, and rugged construction. For critical applications, the PIM and Paracell support redundant software and hardware that can be designed to assume control should portions of the hardware fail.

For more information from Flavors Technology Inc, Amherst, NH, circle 323.
COPYRIGHT 1992 Nelson Publishing
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 1992 Gale, Cengage Learning. All rights reserved.

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Title Annotation:Technology Update
Publication:Tooling & Production
Date:Feb 1, 1992
Words:534
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