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Simulating Pb-free reflow: predicting temperature gradients prior to prototyping makes it easy to optimize oven settings and thermocouple attachment points.

As the PCB passes through reflow, components are heated at different rates, resulting in a temperature gradient over the board. All components must reach a temperature high enough to melt the solder while not exceeding the maximum component body temperature. Achieving this requirement can be difficult in Pb-free reflow because most Pb-free solders melt at higher temperatures while the maximum temperature to which components can be exposed remains the same. In most cases, the move to Pb-free manufacturing requires that the temperature gradient over the board be reduced in order to meet quality requirements. Up to now, this has been difficult because board designers have had no way to determine how the layout would affect temperature variations during the reflow process. In addition, manufacturers are changing oven configurations in an attempt to achieve solderability. The result is that many more test boards have to be profiled in the oven to determine optimum oven settings.

Computational fluid dynamics (CFD) simulation of the reflow oven makes it possible to design PCBs for Pb-free manufacturing by predicting thermal gradients during solder reflow processing. Engineers can evaluate the thermal gradients generated by different component layouts at an early stage in the design process. Simulation of the reflow process also makes it easy for manufacturing engineers to optimize oven settings and thermocouple attachment points prior to a physical profiling run. This can typically reduce startup time for a new PCB.

The challenge for assemblers is that during reflow the coldest component on the board must be hot enough to the melt the solder but the hottest component must not exceed the maximum component body temperature. In other words, the maximum temperature attained by each component during the reflow process must fall within a defined range, called the process window. Pb-free solders melt at a higher temperature than Pb-based solders but the maximum temperature that components can withstand in a solder oven has not changed. The maximum body temperature as defined by J-STD-020 ranges from 245[degrees] to 260[degrees]C. (1) This means that the process window is much narrower with Pb-free solders. With the maximum body temperature at 245[degrees]C and the solder reflow temperature at 235[degrees]C, the process window is typically only 10[degrees]C. Maintaining the process window is important for other reasons as well since temperature gradients over the board can also give rise to board and component warpage, delamination and tombstoning.

Predicting Temperature Gradients

If a PCB were kept in an oven for an infinite period of the time the temperature of each component would stabilize at the oven temperature. In that case it would not be difficult to hold a narrow process window. However, the time that the solder remains over its liquidus temperature must also be controlled. The maximum temperature of each component during the reflow process varies depending upon a complicated series of factors including the component size and position, board layout, air temperature in zone and conveyor speed. Thus the rate at which each component heats up determines the maximum temperature that it will attain. The overriding factor that affects the rate at which different components heat up is the thermal mass of the components, their ability to absorb and hold heat. The larger the thermal mass of a component, the longer it takes to heat up. Thermal mass of a component is determined by the following formula:

[T.sub.c] = [[rho]V[C.sub.p]I]/KA


[T.sub.C] = Thermal mass

[rho] = Density

V = Volume

[C.sub.p] = Specific heat

I = Length

k = Thermal conductivity

A = Cross-sectional area

The thermal mass of the component is proportional to its density, volume, specific heat, and length and inversely proportional to its thermal conductivity and cross-sectional area. The specific heat in turn is the amount of heat per unit mass required to raise the temperature of the component by[degrees]1[degrees]C. The formula shows that larger components have a higher thermal mass than smaller components so smaller components heat up more quickly (Figure 1). Grouped components heat up more slowly (Figure 2), like large components because much of the heat that the components transfer to the air through conduction is in turn transferred to other nearby components, so the overall system stays hotter than it otherwise would. In an evenly spaced group of components, those near the edges and especially in the corners heat up more quickly (Figure 3) because they have fewer nearby components to transfer heat to through conduction. Different package styles also have different thermal response properties because their specific heats are different. Ceramic has a lower specific heat than plastic so ceramic packages tend to heat up more slowly.

These rules of thumb provide an indication of how the board will respond thermally to the reflow process. On a fully populated board, all the rules are operating simultaneously in different areas of the board (Figure 4). So the thermal response of an actual populated board is nearly impossible to predict using the rules alone. One reason why it's so important to understand thermal response is that the response of the board to reflow is generally the opposite of the way it responds to powered operation. That is, when the board is powered, grouped components and components in the center of board tend to heat up more quickly. This is because the heat in this case is generated internally, so it is moving in the opposite direction as in the reflow oven--from the board to the surrounding air. The result is that changes made to the board during design to improve thermal management during operation generally worsen the performance of the board during reflow.

In the past, PCB layout was primarily undertaken with signal integrity issues in mind. More recently, board designers have begun to pay attention to the effects of layout on thermal management. The move to Pb-free solder brings another important consideration to board design: All components need to heat up within a narrow process window in order to successfully assemble the board. If the performance of the board in the reflow oven is not considered during the design process, there is a good chance that additional board profiling runs will be required to address this issue during prototyping.

It is practical, then, for designers to address Pb-free related reflow processing. CFD is a powerful modeling tool in which a 3-D model of the system is built and the governing equations for airflow and all modes are heat-transfer calculated. This approach is accurate because it takes the full geometry of the system into account and relies on fewer assumptions compared to the other methods. Thermal simulation software is now capable of simulating reflow using the same model used for predicting thermal performance during operation. The reflow simulation predicts the temperatures of each component at each point in time during the entire reflow process. At the board level, this analysis can help highlight potential thermal issues and provide engineers with more flexibility in resolving them (Figure 5). Problems identified at this early stage of the process can often be addressed by layout changes that can be made at little cost.

The design process typically works as follows. PCB designers can begin the thermal design process from within their design software. Designers simply call up a menu item and with a few mouse-clicks generate a thermal model of their design. An interface transfers information about the PCB's geometry and components needed to perform thermal analysis. This includes the number of metal layers, the type of each layer (signal or power or ground plane), the coverage of copper on the board, and the location and power dissipation of each component. The interface also allows the user to select the appropriate layer used to derive the physical extents of the package. Placement updates made in thermal simulation can be passed back to PCB design, thus providing bidirectional connectivity, permitting concurrent placement and thermal design.




Designers or manufacturing engineers define the oven environment parametrically by defining the dimensions and temperature of each zone of the oven and the conveyor speed. The software then simulates the reflow process and predicts the temperature profile of each component during reflow. Any component whose maximum temperature does not fall within the process window can thus be identified, and the board design modified to correct any problems. As a general rule, two types of changes can be made to correct problems in thermal performance during reflow. Components can be rearranged to spread component thermal mass more evenly over the PCB, moving larger components toward the hotter edges and smaller components toward the cooler center of the PCB. Designers can also evaluate the effect of changes in the oven calibration, such as increasing the number of heating zones or the length of heating zones.

The ability to simulate the effect of PCB layout on reflow oven performance in the early stages of design makes it possible to optimize the design for reflow at the same time is being optimized for thermal management and signal integrity. Designers can thus make necessary tradeoffs between these important considerations during the early stages of the design process at little or no cost, avoiding board re-spins. Manufacturing engineers can optimize oven settings such as conveyor speed and zonal temperatures in order to minimize thermal gradients. The coldest and hottest points on the PCB can be identified without the need for a physical test board so that thermocouples can be attached to the appropriate points for reflow profiling. The oven calibration starting point can be predicted to minimize the number of profiling runs required.




1. IPC/JEDEC J-STD-020C, "Standard For Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface-Mount Devices," July 2004.

Sherman Ikemoto is business development manager, Flomerics Inc. (; Robin Bornoffis product manager at Flomerics.
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Author:Bornoff, Robin
Publication:Circuits Assembly
Date:Oct 1, 2006
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