Printer Friendly


Synopsys Inc. (Nasdaq:SNPS) has agreed to acquire the privately-held Everest Design Automation, Inc., thus arming Synopsys with significant technology for next generation system-on-a-chip (SOC) development. Merging Everest's shape- based, top-level-routing technology --targeted at handling the complexities of SOC --with Synopsys' proven chip design software, services and methodology, Synopsys will be able to offer its customers faster time to market. The business combination will be accounted for as a pooling-of-interests. As a result of the transaction, Everest Design Automation will become a wholly-owned subsidiary of Synopsys.

"Everest has truly advanced the state-of-the-art of top-level routing technology, and their approach is ideally suited for the problem of chip-level assembly for system on a chip design," commented Dr. Kurt Keutzer, professor of Electrical Engineering and Computer Science at the University of California, Berkeley, and a widely respected academic in the EDA field. "This technology fits very well with Synopsys' approach to design planning. The combination of the two companies brings Synopsys a key tool for their design flows."

Design Planning -- The New Approach for SOC Design

With Everest routing technology added to its tools and design flows, Synopsys will provide engineers much better accuracy and predictability of performance through a style of SOC implementation called design planning. Complete SOC design requires a top level router that is used to interconnect the various circuit blocks, IP, and memories with the chip. The Everest shape based router further aids in solving the problems of deep submicron SOC design through its greater flexibility than today's grid-based routers.

To achieve the most effective block-based design planning flow, the critical technologies of synthesis, timing, placement and top level routing, all must work together in unison. With Synopsys' design planning approach, chip designers will retain the comfort of the Synopsys workflows and toolsets they are accustomed to using to create their chips, no matter how large or complex they are, while also benefiting from faster time to successful silicon. Using design planning, timing effects due to routing will be accounted for and passed back to the top level to produce better synthesis results. Synopsys has been actively developing products in the design planning area for the last two years. The company intends to roll out its first design planning product offering early in 1999 and will include some routing capability using the technology from Everest.

New Routing Product As Well

Besides greatly assisting its customers in rapidly completing system on chip designs with design planning technology, Synopsys will be offering Everest's top level router as a stand alone product. Everest's capability in routing large SOC designs represents a significant increase in capability from today's

commercial offerings. The shape-based routing algorithms allow rapid and efficient interconnect of high-level circuit blocks, cores, memories and IP within a system on a chip, while simultaneously accounting for deep submicron effects. Synopsys expects to begin offering the Everest top-level router for sale for this purpose in the first calendar quarter of 1999.

"The Everest tools provide Synopsys with an outstanding routing solution. Everest has achieved remarkable speed and ease-of-use, and routing optimization of this caliber will become increasingly critical to tape-out success," added James Wu, engineering manager of NEC Electronics.

"I am confident that this acquisition will return successful gains for both Synopsys and the Everest team," said Dr. Robi Dutta, chairman and CTO at Everest. "The Synopsys design flow provides the best fit to capitalize on our technology and there's a strong cultural affinity we can leverage as well."

"Synopsys has found in Everest a key element in the total solution for system on a chip design," commented Dr. Aart de Geus, chairman and CEO of Synopsys. "IC design today is in constant jeopardy of breaking down at the back end of the development cycle. Everest's routing technology coupled with Synopsys superior top-down design tools and methodology will be instrumental in achieving major leaps ahead in the realm of system on a chip. Only Synopsys, with its leadership in design creation through synthesis, is capable of making such a contribution to design productivity."

Synopsys, Inc.

Synopsys Inc. (Nasdaq:SNPS), is a leading supplier of electronic design automation (EDA) solutions to the global electronic market. The company provides comprehensive design technologies to creators of advanced integrated circuits, electronic systems and systems-on-a-chip. Synopsys also provides consulting services and support to its customers to streamline the overall design processes and accelerate time-to-market. Additional information about Synopsys is available at

For more information, call 650/528-4902.
COPYRIGHT 1998 Worldwide Videotex
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 1998 Gale, Cengage Learning. All rights reserved.

Article Details
Printer friendly Cite/link Email Feedback
Publication:Electro Manufacturing
Geographic Code:1USA
Date:Dec 1, 1998

Related Articles
Synopsys Acquires Everest Design Automation; Chip Router Complements Company's Software Design Tool Suite to Provide Top-Down Design Planning.
Synopsys Terminates Stock Repurchase Program.
Synopsys Reports First Quarter Results; Pro Forma Revenue and Earnings Surge 13% and 75%, Excluding Unusual Items; Merger with Everest Design...
Synopsys Said to Have Acquired Gambit.
Synopsys Pro Forma Revenue Up 21%; Pro Forma EPS Rises 36%; Record Second Quarter Results Posted.
Avant's Entry into Formal Verification "Won't Hurt Synopsys".
Synopsys Delivers System On a Chip Top-level Router -- the Next Component in Its Physical Synthesis Solution.
Synopsys Acquires Stanza for Deep Submicron Tools.
Synopsys Pro Forma Revenue Up 25%; Pro Forma EPS Jumps 35%; Record Third Quarter Results Posted.

Terms of use | Copyright © 2017 Farlex, Inc. | Feedback | For webmasters