Printer Friendly

Routing differential pairs: while some argue that differential pairs work just fine if they are not coupled, the layout tradeoffs say that routing traces closely is prudent. (Differential Signaling).

The traditional data interface methodology known as parallel starts to run out of speed at 200 MHz and data bandwidth because of the sheer number of pins/signals required to move the volumes of data. The savior is the rapidly adopted interface methodology known as serial, an interface technology that uses differential signaling techniques to achieve the necessary speed and data throughput, while addressing some roadblocks encountered by parallel interfaces, such as lower noise emission/susceptibility, fewer device pins, fewer signals, and the ability to drive signals over greater distances.

What's does it all mean for you, the PCB designer? Obviously, a new set of design requirements, for starters. These new requirements will center on routing two traces close together, but it's not quite that simple. There's a ton of theory, but the reality, at least in terms of what's required on a PCB, might surprise.

Differential signaling is a method of sending the same piece of information over two traces. For differential data transfer, two traces and (at least) one driver with a positive and negative output and a two-terminal receiver are used. For digital applications, the driver terminals send out signals of opposite polarity. While the so-called non-inverted or positive output emits a low-to-high transmission, the inverted or negative output sends out a high-to-low transmission. FIGURE 1 shows the two output signals, plus a third, the differential waveform. This third waveform is formed by taking the difference of the positive and negative signals based on the equation


[V.sub.diff] = Vp - Vn.

This operation is performed by the internal circuitry of the differential receiver.

The Theory ...

There is no shortage of disagreement among the experts on terminology and whether we should speak in terms of things such as common mode, differential mode, or just odd-mode. In the simplest of terms the bulk of the theoretical benefit of differential pairs comes from the use of equal and opposite signals on the two traces. Also, there is usually tight coupling between the traces. This means that the traces are close enough so that the electrical energy from each can be seen on (couples onto) the other. The major benefits of these equal and opposite signals sent down tightly coupled traces are generally accepted to be

1. Noise immunity. Any noise that couples itself onto one of the signals will also do so on the complementary signal. Since the noise is seen on both of the signals, it is canceled out in the differential signal.

2. Reference voltage insensitivity. The differential signal already has a built-in reference, thus differential signaling can be used in situations where the driver and receiver do not share the same reference (ground). This also benefits other potential signal integrity problems such as ground bounce.

3. Reduced EMI. The argument here is along the same lines as induced noise being canceled. The difference is that, for EMI purposes, it refers to noise radiated from the complementary signals that is canceled because of their differential nature. One last piece of theory to cover is differential impedance. This is the impedance seen by the differential signal and is based on the individual impedance of the two traces and the coupling between the traces.

... And the Reality

Here's an example of what one would typically see for constraining differential signals based on some of the current standards.

* [Z.sub.OD] = 100 [ohm] [+ or -] 10%. This is the differential impedance and is usually stated as one of the governing factors. Individual trace impedance may also be specified and is usually close to 50 [ohm]. The spacing between the differential pairs and/or the trace width may also be specified, but unless a stack-up is also specified the default will always be the differential impedance.

* Each signal and its complement must match within 0.025". The exact constraint isn't important and may actually be less, depending on the speed. But the point is that each pair of differential traces must be matched in length.

* Spacing to other signals must be a minimum of 0.020". This is the spacing from any differential pair trace and any other signal. There may be a separate spacing from differential pair to differential pair as well.

* Clock/data group must match within [+ or -] 0.250". Again, the exact number may be less, depending on the speed of the interface. But, depending on the application, the differential pairs will most likely need to be relative to the length of other differential pairs in the same group.

* Maintain a constant reference plane. This is sometimes called keeping the group on the same layer with the same reference. Additional requirements may also suggest limiting layer changes to package breakout only.

The aforementioned might lead one to believe that it's most important to place differential pairs as close together as possible and maintain a constant differential impedance. Seems logical and there's no shortage of datasheets, guidelines and ugly math to back it up. After all, the theoretical need for "opposite and equal signal" signals will be provided by the driving device, so all that's left is to worry about the differential impedance. The glaring difference is that the theory is usually based on tight coupling such as a twisted pair, whereas the typical 100 [ohm] [Z.sub.OD] dictated for a PCB is based on loose coupling. FIGURE 2 shows a typical cross-section for 100 [ohm] differential pair where S = 0.011" and W = 0.004". In this case, and even in cases where the traces are closer (S = 0.004"), the traces couple more to the planes than to each other.


Seems confusing, but let's revisit the theoretical benefits for possible answers. For noise immunity it's just not practical to couple the traces (actually place the traces) so close together that any aggressor signal couples equally onto both signals. The real reduction in crosstalk is based on keeping away the aggressors in the first place. The impact of the coupling diminishes proportionally to the square of the distance between an aggressor and one of the traces, and this dominates over the coupling to each of the traces. The benefits related to reference voltage have more to do with the basic technology and nothing to do with the coupling between traces. What's left is EMI, and while this certainly benefits from keeping the traces together, remember that the traces are loosely coupled. So, although the theoretical benefits apply in the PCB realm, none of them seems to directly relate to maintaining a specific differential impedance based on loose coupling.

The last bit of confusion is the fact that differential technology can be used in situations where the driver and receiver use completely different references but the constraints say to keep a constant reference plane. At this point there appears to be a major disconnect between theory and reality but what is required is a slightly different approach to both the theory and the constraints.

Let's revisit the theory first. Remember "the bulk of the theoretical benefit of differential pairs comes from the use of equal and opposite signals on the two traces." These complementary signals are provided by the driver; the key is what happens to make sure that they stay "equal." Designers must keep traces that carry those signals as equal as possible; symmetry is the key. The rest of the answer comes from the fact that the theory says nothing about the speed of these signals, or more specifically, the speed of the signal edge rates. If these high-speed signals were single-ended, then controlled impedance and termination (based on the length) would be major considerations.

Now let's revisit the constraints, but in a different order. If symmetry is king, then keeping the traces in the pair matched makes sense. This is more important than a static check; the signals really need to be in phase over the entire distance. Keeping the signals on the same layer and minimizing transitions and even the coupling requirements are all about keeping the two traces as symmetric as possible. The spacing to other signals makes sense from the noise perspective, but the coupling still plays a role in the noise immunity. Finally, the rest is related as much to the fact that these are high-speed signals. The differential impedance gives a target for matching any termination to be seen by the differential signal. The same is true for the constant reference plane. This and the coupling ensure that EMI will be minimized.

How does all this translate into laying traces? Differential pairs will have twice as many traces but often the actual overall interface has a reduced number of signals. This may offer little comfort based on the complexity of the rest of the design. Regardless, these two signals need to be treated as a single unit. The differential impedance will dictate the line width and spacing, but the routing strategy should be entirely based on symmetry--equal and opposite--the driver will provide the opposite and you make sure it remains equal from driver to receiver.

Design rules should cover the basics such as line width and spacing (between the two traces in the pair and to anything else) but should also cover the more complex issues. FIGURE 3 shows two sets of differential pairs. The DRCs on the left highlight an area where the two traces have become uncoupled after initially coupling; the right shows a DRC because the two traces are out of phase before they are coupled.


If at all possible, there should be various points in the overall routing where the traces should be checked for length matching to ensure that they remain in phase. One place where this makes sense is the first time they couple after the connections exit their respective device pins on the driver component, often known as the gather point. If this isn't possible, the next best thing is a static check for length matching from end to end. It recalls the equal and opposite argument: The two complementary signals in FIGURE 1 need to arrive at the receiver at the same time. If you can imagine one of the top two waveforms shifting in time by itself, the result is that the differential pair will no longer be optimized and could impact the noise and timing.

FIGURE 4 shows a host of bad practices when it comes to differential routing. The use of 45[degrees] angles is preferred vs. 90[degrees], which will introduce a length mismatch and lead to the traces uncoupling slightly. Other absolute no-nos include the vias and transition to another layer on one leg and the exaggerated situations where the traces uncouple. Some uncoupling is unavoidable but a minimal amount should be tolerated and constrained.


When faced with the daunting task of routing a large group of differential pairs to both phase and matched length rules across the entire group, it may be best to first route the group to matched or relative condition rules, followed by selectively tuning the pairs that are not in phase. Since the tolerance within the entire group will usually exceed any one differential pair's phase tolerance, the priorities are toward routing to the relative conditions first. Ideally, interactive routing should provide dynamic feedback on both sets of constraints simultaneously to assist the routing process.

Ed.: For more information on designing and implementing differential pairs or to actively participate in discussions on the topic, visit the online user community

DENNIS NAGLE is senior technical marketing manager, High-Speed Systems Design at Cadence Design Systems ( He can be reached at
COPYRIGHT 2003 UP Media Group, Inc.
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2003, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

Article Details
Printer friendly Cite/link Email Feedback
Author:Nagle, Dennis
Publication:Printed Circuit Design & Manufacture
Geographic Code:1USA
Date:Aug 1, 2003
Previous Article:Bouncing out ground bounce: ground bounce is a side effect of shorter rise times and increased bus widths. By knowing the physical origin and what to...
Next Article:What causes reflections? In an ideal world signals would propagate down a line with no distortion. But this is no ideal world. (No Myths Allowed).

Related Articles
So far, so close: understanding return current in a differential pair. (No Myths Allowed).
Routing high bit-rate connectors: the physical characteristics and routing tradeoffs of using 3.125 Gb/s parts. (Interconnect Strategies).
Rules of thumb I have known and loved: while no substitute for good design practices, in certain situations they can be useful.
Does your design need HDI? HDI is more expensive process, but overall product cost can be lower thanks to fewer layers and smaller boards.
PCB directions: don't lose your way. Use these guidelines and stay on course.
Differential signals routing requirements, Part II: for noise immunity, complementary transmitted signals need to be well balanced and trace...
High-speed: PCB design basics: consistency in impedance requires cooperation and coordination between the designer and the fabricator to optimize...
Solving PCB design interconnect challenges: new design tools that incorporate strategic planning, routing guidance and design feedback.
Selecting the right SerDes device: OEM designers and their EMS partners should evaluate SerDes device characteristics and match them to know PCB...
Next generation PCB design constraint management: new design systems support multiple users and concurrent rules--and they automate repeat tasks and...

Terms of use | Copyright © 2017 Farlex, Inc. | Feedback | For webmasters