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Real-time adaptive beamforming: FPGA implementation using QR decomposition.

Increasing use of the radio spectrum in both the communications and military frequency bands is expected to result in increased interference, which must be addressed through improved design of antennas, receivers, and processing systems. In the communication world, increasing use of antennas in built-up areas introduces multipath effects and inter-system interference. In the military case the availability of low-cost technology is expected to result in a proliferation of jamming systems.

Phased-array antennas and adaptive beamforming (ABF) offer the potential to overcome many of the interference problems encountered, by reducing the antenna's sensitivity in the direction of the interference source, through modification of the relative phase and gain of the array elements.

For military systems, jamming is a key problem that is difficult to mitigate using conventional "fixed-beam" antenna systems. For these systems, fully digitized phased arrays may be justified. However, such antennas often operate in complex scenarios in which the antennas, targets, and jammers may move rapidly with respect to the radar's coherent-processing interval. In such situations, advanced ABF techniques, such as the Extended Sample Matrix Inversion Technique (ESMI), are required in order to maximize the interference rejection over the processing interval. These algorithms require more complex processing to provide real-time operation within a limited space and power, making solutions based on digital signal processing (DSP) or PowerPCs unsuitable. More compact solutions are, therefore, required, with FPGAs or ASICs providing a technology route to a final production system.

[FIGURE 1 OMITTED]

An example of such a radar sensor is a phased-array missile seeker. A prototype radio-frequency (RF) phased-array sensor for this application--developed for the UK Ministry of Defense (MoD) Research Acquisition Organization by QinetiQ Ltd., in conjunction with AMS--has a small number of elements allowing digitization of all of the array elements, which maximizes the control of the beam pattern. This does, however, increase the processing required to provide adapted beam patterns. The additional requirement for the ESMI algorithm increases the processing further, effectively doubling the number of channels for which adaptive weights must be calculated.

[FIGURE 2 OMITTED]

Over many years, QinetiQ has been developing suitable processing techniques to enable real-time implementation of adaptive beamforming for such systems. Adaptive beamforming can be undertaken in the conventional covariance domain or, alternatively, the data domain via QR decomposition, which has been shown to be more suitable for FPGA implementation and more robust to reduced numerical precision, as a matrix inversion is not required. This has led to the development of a QR-decomposition FPGA core, which is central to the development of real-time ABF processing hardware systems.

Real-Time Adaptive Beamforming

Many sensor systems, such as radar, require real-time processing of all data samples. This data can, however, be broken into distinct processing intervals that define the available time in which all processing must be completed to maintain real-time operation. In the ABF case, the adaptive weights, which define the phase and gain of each array element, need to be applied to the data from which they were calculated in order to maximize the effectiveness of interference rejection. This requires the storage of data samples while ABF weight calculation is undertaken, introducing data latency into the system. This results in a processing system that utilizes a number of key FPGA cores: a QR decomposition core; (3) floating-point multipliers, dividers, and adders; a memory interface to create a FIFO using external memory; high-speed serial FPGA inter-connection; and a digital receiver.

The use of the ESMI ABF algorithm extends the input data set, generating a time multiple of the sensor data by multiplying each data sample by a value that depends upon the time from the start of the processing interval. This enables calculation of an additional weight, per array element, that describes how the magnitude and phase of the main weights should change at each data sample over time.

ABF Weight Calculation

QR decomposition is a method for solving a set of simultaneous equations, for unknown weights, which define the beam shape. If the number of equations equals the number of array elements, then an exact solution can be found. If more equations are available, a minimum error solution will be determined. To reject interference, a solution to the equations is required that minimizes the received power. An additional gain-constraint

equation, which defines the gain in the beam-pointing direction, is required to stop this minimization from setting all of the array weights to zero. Additional constraint equations can be applied to define other points in the beam if required. To further reduce the beam sidelobes and minimize the beam pattern jitter, caused by noise within the adaptive weight calculation, additional beam constraints can be applied, such as the Penalty Function Method. The data collected from the sensor, along with these beam constraints, forms the input-data matrix to the QR processing.

The QR core employs Givens rotation to convert the input data into an upper triangular matrix, which can be solved for the weights via back substitution. The Givens rotation employs two processing units called vectorise and rotate cells, as shown in Figure 1.

To implement each vectorise and rotate cell separately would require a large amount of FPGA resources. The throughput of the full QR array would also exceed most practical system-processing requirements. To reduce the FPGA resources required and provide a more practical solution, the triangular QR array can be mapped to a linear array of locally interconnected, time-shared processors, as shown in Figure 2. Mapping onto a linear array separates the vectorise from the rotate processors, allowing each to be optimized for its specific operation.

In the linear array of processors there is always one vectorise process and m rotate processes. To allow the QR to map onto a linear array, it is required that the number of input columns, N, is odd to ensure that m is an integer. The relationship between m and N is shown in the following equation:

m=[(N-1)/2][right arrow]N=2m+1

In some configurations it may be necessary to extend the data matrix to ensure that N is odd so that the QR can map onto a linear array. This can be done by inserting a column of zeros to the left of the matrix, as necessary.

A linear mapping provides the additional advantage that there are an equal number of operations on each processor so that the load is equally balanced. When successive QR updates are interleaved, a regular processing sequence is formed, as shown in Figure 3. In the sequence, there are no gaps, so the linear array is 100% efficient.

In larger QR-decomposition problems, it may not be possible to fit m rotate processors within the FPGA resources available. For this reason, the FPGA core can be configured to map c columns of processes onto one rotate processor, creating a compressed linear array. This is depicted in Figure 4 for the case where N=9, m=4, c=2, and r=2. The number of physical rotate processors can, therefore, be varied between 1 and m.

To map c columns onto one processor, the number of physical processors required, r, is determined by the following equation:

r=[??]m/c[??]

where:

[??][??] is the ceiling operator

All but the last processor implements c processes, with the last processor implementing the remaining m-(r-1)c processes. This caters for the situation in which the number of internal processes, m, is not an exact multiple of the number of physical processors, r. The number of rotate cells required can be determined from the desired processing speed and the FPGA resources available. Only a small number of rotate processors can be implemented before the FPGA resources are fully utilized.

The processing time to perform the QR decomposition is related to the number of array channels and the number of processing cells implemented. To implement ESMI, the number of array channels is twice the number of array elements, which increases considerably the processing time required.

After the QR-decomposition core, back substitution is required to calculate the array weights, based on the Rn,n and Um values. The linearization of the QR process causes these values to be produced out of order, so they must be re-ordered before the weights are calculated. Should any of the Rn,n values, from the vectorise cells be zero, then a solution for all of the weights cannot be calculated. However, this should not occur in practical systems that contain noise within the sensor data.

ABF System Implementation in FPGA

Along with the QR-decomposition FPGA core, which is the most complex within the processing system, the complete ABF system requires a number of additional components. After the digitization, a digital receiver is required. This component selects the data for the adaptive weight calculation. For the radar case, this may also provide functions such as digital down-conversion and range gating. The collected data needs to be stored while the adaptive weights are calculated by the QR-decomposition core, requiring a memory-interface controller to create a FIFO using the available memory. Once the weights have been calculated, they are applied to the data using a complex multiplier. To form the adapted beam, the weighted data from each of the elements is then added together at each time sample. This gives an output-data stream from which interference signals have been removed. These components are all suitable for implementation in FPGA, giving a solution in a single processing technology.

[FIGURE 3 OMITTED]

The processing solution requires ADC digitization hardware combined with FPGA-processing hardware to implement the digital receiver systems. An example of a processing card for this is QinetiQ's Quixilica Venus VXS payload card, which provides five ADC channels, a large Virtex-II Pro P70 FPGA, and external QDR and DDR memory, which can be configured as a large FIFO using an appropriate FPGA memory controller. To provide sufficient ADC channels, a number of VENUS cards would be required.

The QR-decomposition core is best separated from the digital receiver in order to maximize the FPGA resources available for the QR operation and, hence, to minimize the processing time required to calculate the adapted beam weights. An example of a system for the implementation of the QR FPGA core is QinetiQ's Quixilica Callisto VXS switch card, which provides five Virtex-II Pro P50 FPGAs. This enables multiple beams to be calculated using multiple QR cores, each in a separate FPGA, or a larger number of rotate processors to be spread over multiple FPGAs, reducing the processing time required.

Both of the processing cards provide connection of the FPGAs' highspeed serial I/O to a VXS backplane, which enables rapid transfer of data between the FPGAs on different cards at up to 3.125 Gbits/sec. per serial link. Initially, the data that is used to generate the adaptive weights is transferred from the VENUS cards to the Callisto card that performs the QR decomposition. The adapted weights are then sent back to the VENUS cards and applied to the data. A partial beam can then be calculated on each of the VENUS cards by summing the available element data before data is passed to a second Callisto card, which sums the partial beams and transfers the beam data to a DSP system for later processing. This gives a complete ABF-system configuration.

[FIGURE 4 OMITTED]

Radar systems that employ monopulse to estimate the target angle relative to the antenna would require the simultaneous calculation of three adapted beams, providing a sum beam and azimuth- and elevation-difference beams. In communications systems, the use of multiple adaptive beams would allow space-division-multiple-access to be realized, providing increased communications capability from a single antenna.

Alternative Applications

Most adaptive beamforming systems are currently targeted at radar systems, due to the development and hardware cost of these complex processing systems. However, as the cost of the processing hardware and digitized phased-array antennas is reduced, they will become more applicable to communications systems and, particularly, mobile-phone base stations. The techniques and hardware described are also applicable to sonar applications and adaptive digital filtering, which could reduce adjacent-channel interference in communications systems, enabling increased use of the frequency spectrum.

Advanced ABF techniques such as ESMI, which were originally developed for military radar systems operating in non-stationary environments, are also applicable to communications systems. Such systems may experience rapid movement of the antenna, due to wind effects or aircraft movement, as in the case of QinetiQ's SKYLINK phased-array video-relay system, which is used for outside broadcast of TV events. Rapid motion of the receiver (e.g., a mobile phone in a vehicle) may also cause rapid changes to the multipath and interference effects, which reduce performance.

Real-time adaptive beamforming is now possible in compact processing hardware. The QR-decomposition technique for adaptive weight calculation is particularly suited to implementation in FPGA, with suitable FPGA cores now available that reduce the system-development time. These cores can be used with other DSP and floating-point cores to provide a complete array-sensor-processing system in FPGA technology.

The application of more advanced ABF techniques, such as ESMI, can provide increased interference rejection, at the expense of increased processing complexity. The complexity of the ABF processing drives the system to FPGA or ASIC technology to provide compact systems that provide real-time operation.

Acknowledgements

QinetiQ would like to acknowledge that part of the work, described in this article, was funded by the UK MoD's Research Acquisition Organization.

M. K. Gay, BEng CEng MIEE

Michael graduated with a BEng Hons in Electronic and Electrical Engineering from the University of Lancaster in 1991. Michael is currently employed by QinetiQ Ltd., formerly known as the UK MoD's Defense Evaluation Research Agency. He works within the real-time embedded systems department developing FPGA-based processing systems to provide real-time adaptive beamforming.

I. A. Phillips, MEng MIEE

Isabel graduated from the University of Strathclyde in 2003, with a MEng in Electronic and Electrical Engineering. Since joining QinetiQ Ltd., in 2004, Isabel has worked within the real-time embedded systems department on the development of FPGA-based signal-processing systems and is currently working on developing FPGA designs for adaptive beamforming using QR decomposition.

Michael Gay and Isabel Phillips, QinetiQ Ltd.
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Title Annotation:Field-Programmable Gate Arrays
Author:Gay, Michael; Phillips, Isabel
Publication:Journal of Electronic Defense
Geographic Code:4EUUK
Date:Sep 1, 2005
Words:2343
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