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Power quality improvement by unified power quality conditioner based on CSC topology using synchronous reference frame theory.

1. Introduction

The main impact in the power distribution system is the quality of power, which causes more distortion in the source due to using nonlinear loads (power electronics loads). The main cause for distortion is harmonics, notching, and interharmonics. Distortion is that the fundamental frequency sine wave is represented as super position of all harmonic frequency sine waves on fundamental sine wave. The usage of power electronics loads is increased day by day, while considering that industries power electronics drives are used for the automation of the industries. To compensate the distortion in the system, passive filters were used and while using the passive filters particular harmonic range is only eliminated. In order to overcome the drawbacks of passive filter, for the elimination of power quality problems, active filters were used.

Power quality problems are harmonics, sag, and swell which are mitigated by the active filters by the configuration of dynamic voltage restorer (DVR), distribution-static synchronous compensator (D-STATCOM), and unified power quality conditioner (UPQC) [1]. In this paper UPQC [2] is used for the mitigation of the power quality problems which is the combination of series and shunt active filters. The series and shunt active power filters are voltage and current source converters which are controlled by the PWM signals which are generated by the controllers.

2. Unified Power Quality Conditioner (UPQC)

The unified power quality conditioner is commonly called UPQC. The design configuration is based on the connection of series and shunt inverters. In this, the design configuration is right series and left shunt with the current source converter (CSC) [3,4]. In this paper, UPQC-CSC [5, 6] is designed and analysis of the results has been done. Unified power quality conditioner (UPQC) for nonlinear and voltage sensitive load has following facilities.

(i) It reduces the harmonics in the supply current, so that it can improve utility current quality for nonlinear loads.

(ii) UPQC provides the VAR requirement of the load, so that the supply voltage and current are always in phase; therefore, no additional power factor correction equipment is required.

(iii) UPQC maintains load end voltage at the rated value even in the presence of supply voltage sag.

The design configuration of UPQC-CSC [7] is shown in Figure 1.

3. Synchronous Reference Frame (SRF) Theory

The control strategy for the unified power quality conditioner is based on the synchronous reference frame (SRF) [8, 9] theory. In this theory controlling of the three-phase converters using the rotating frame theory by converting the source voltage and current to direct and quadrature axis is done. The voltage is converted to dq in the series controller and current is converted to dq in the series controller. Consider

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The dq transform is again converted to the [V'.sub.abc] in order to get the reference signal which is used for the generation of the pulse for the three-phase converter in the system. Consider

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The shunt converter performs the process of elimination of harmonics and series converter performs process of elimination of the voltage related problems. The control block diagram for the synchronous reference frame theory is shown in Figure 2.

3.1. Series Controller. The control strategy of the series controller is achieved through the synchronous reference frame theory. In this, the series controller gets the reference signal for the generation of pulse for the three-phase converter, by comparing the source voltage with distortion and constant voltage. The source voltage [V.sub.s abc] and constant voltage [V.sub.ref abc] are converted to the [V.sub.s dqo] and [V.sub.ref dqo] transform. The [V.sub.s dqo] and [V.sub.ref dq0] are compared to get the error signal which is again converted to [V'.sub.jabc]. The [V'.sub.labc] is the reference signal for the pulse generator. The simulation diagram for synchronous reference frame theory based series controller is shown in Figure 3.

3.2. Shunt Controller. The shunt converter has the function of compensating the current related problems. Along with the shunt controller, DC link voltage is maintained. The abc to dq0 transform is inversed and converted to abc; that signal is given as the reference signal and the measured signal is given to the hysteresis band PWM to produce the pulse signals for the operation of shunt converter. The simulation diagram for shunt controller is shown in Figure 4.

3.3. DC Link Controller. The direct current link controller has the PI controller in which the constant voltage is given as the set point and the measured voltage is given for the comparison to maintain the constant voltage. The PV array is attached with the DC link for injection. The DC link controller is shown in Figure 5.

4. Simulation and Results

The UPQC-CSC has the reactor as the DC link for the series and shunt converter and is controlled by the synchronous reference frame (SRF) theory and the pulse is generated by the hysteresis band controller. The shunt and series converters have the function of compensating current and voltage problems, respectively. The simulation of UPQC-CSC is shown in Figure 6. The output of UPQC-CSC is shown in Figure 7 which shows the voltage with sag, current with harmonics, and compensated voltage and current. The compensation of sag is shown in Figure 8. The shunt compensation is shown in Figure 9. The series compensation is shown in Figure 10.

4.1. System Parameters. Consider

source voltage: 415 V, 50 Hz; load parameters: resistive load: 10 K[OMEGA]; inductive load: 2 mH; RLC load: 10 KW;

shunt inverter side: LC filter: 3.5 mH, 5 [OMEGA], and 10 [micro]F;

series inverter side: LC filter: 12 [micro]H, 5 [OMEGA], and 10 [micro]F;

DC link reactor: for UPQC-CSC: 200 mH; solar voltage: 727.1 V.

Figure 7 shows the simulation output of the UPQC-CSC simulation for voltage sag mitigation. The sudden addition of load in the system causes voltage sag for the time duration of 0.04 to 0.08 s. The compensation for the sag is by the series active filter using the SRF theory for the reference signal generated and pulse generated by the hysteresis band and given to the IGBTs in the filter.

The compensation of the voltage related problems is done by the series active filter to maintain the system voltage 1 P.U. By using the SRF theory even a minor disturbance in the system is sensed and compensation is done; Figure 10 shows the series compensation for the system. The harmonics compensation is done by the shunt active filter along with the DC link voltage controller. Total harmonics distortion (THD) for the current source converter is shown in Table 1. Figure 9 shows the compensation given for reducing the harmonics.

The Fourier fast transform analysis graph for the source voltage THD of about 0.89% is shown in Figure 11.

The Fourier fast transform analysis graph for the load voltage with the nonlinear loading conditions of about 0.45% is shown in Figure 12.

The Fourier fast transform analysis graph for the load current with the nonlinear loading conditions of about 0.17% is shown in Figure 13.

5. Conclusion

In this paper, synchronous reference frame theory based control method is implemented to control the working of unified power quality conditioner based on current source converter topology. The simulation results show that the device is capable of compensating the current harmonics under unbalanced and nonlinear load conditions, simultaneously mitigating voltage sag and swell. The proposed UPQC-CSC design has superior performance for mitigating the power quality problems. The series converter is capable of mitigating the voltage related problems and shunt converter is capable of mitigating the harmonics.

http://dx.doi.org/10.1155/2014/391975

Conflict of Interests

The authors declare that there is no conflict of interests regarding the publication of this paper.

References

[1] V. Khadkikar, "Enhancing electric power quality using UPQC: a comprehensive overview," IEEE Transactions on Power Electronics, vol. 27, no. 5, pp. 2284-2297, 2012.

[2] M. Kesler and E. Ozdemir, "Synchronous-reference-frame-based control method for UPQC under unbalanced and distorted load conditions," IEEE Transactions on Industrial Electronics, vol. 58, no. 9, pp. 3967-3975, 2011.

[3] N. Zhu, D. Xu, B. Wu, F. Liu, N. R. Zargari, and M. Kazerani, "Common-mode voltage reduction methods for current-source converters in medium-voltage drives," IEEE Transactions on Power Electronics, vol. 28, no. 2, pp. 995-1006, 2013.

[4] P. E. Melin, J. R. Espinoza, L. A. Moran et al., "Analysis, design and control of a unified power-quality conditioner based on a current-source topology," IEEE Transactions on Power Delivery, vol. 27, no. 4, pp. 1727-1736, 2012.

[5] A. Terciyanli, M. Ermis, and I. Cadirci, "A selective harmonic amplification method for reduction of kVA rating of current source converters in shunt active power filters," IEEE Transactions on Power Delivery, vol. 26, no. 1, pp. 65-78, 2011.

[6] V. Kinhal, P. Agarwal, and H. O. Gupta, "Performance investigation of neural-network-based unified power-quality conditioner," IEEE Transactions on Power Delivery, vol. 26, no. 1, pp. 431-437, 2011.

[7] R. El Shatshat, M. M. A. Salama, and M. Kazerani, "Artificial intelligent controller for current source converter-based modular active power filters," IEEE Transactions on Power Delivery, vol. 19, no. 3, pp. 1314-1320, 2004.

[8] C. H. da Silva, R. R. Pereira, L. E. B. da Silva, G. Lambert-Torres, B. K. Bose, and S. U. Ahn, "A digital PLL scheme for threephase system using modified synchronous reference frame," IEEE Transactions on Industrial Electronics, vol. 57, no. 11, pp. 3814-3821, 2010.

[9] J. M. Espi Huerta, J. Castello-Moreno, J. R. Fischer, and R. Garcia-Gil, "A synchronous reference frame robust predictive current control for three-phase grid-connected inverters," IEEE Transactions on Industrial Electronics, vol. 57, no. 3, pp. 954-962, 2010.

Rajasekaran Dharmalingam, (1) Subhransu Sekhar Dash, (2) Karthikrajan Senthilnathan, (3) Arun Bhaskar Mayilvaganan, (3) and Subramani Chinnamuthu (2)

(1) Department of Electrical and Electronics Engineering, RMD Engineering College, Chennai, India

(2) Department of Electrical and Electronics Engineering, SRM University, Chennai, India

(3) Department of Electrical and Electronics Engineering, Velammal Engineering College, Chennai, India

Correspondence should be addressed to Karthikrajan Senthilnathan; karthik.svkk@gmail.com

Received 27 February 2014; Accepted 19 March 2014; Published 11 June 2014

Academic Editors: N. Barsoum, P. Vasant, and G.-W. Weber

TABLE 1: Total harmonics distortion (THD in %).

                            Current source converter

Hn order    Source voltage       Load voltage        Load current
           ([V.sub.s]) in %    ([V.sub.L]) in %    ([I.sub.L]) in %

H                0.97                0.99                0.04
H3               0.28                0.08                0.08
H5               0.09                0.05                0.06
H7               0.03                0.06                0.02
H9               0.03                0.04                0.04
H11              0.02                0.03                0.06
THD              0.89                0.45                0.17
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Title Annotation:Research Article
Author:Dharmalingam, Rajasekaran; Dash, Subhransu Sekhar; Senthilnathan, Karthikrajan; Mayilvaganan, Arun B
Publication:The Scientific World Journal
Article Type:Report
Date:Jan 1, 2014
Words:1796
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