Paying to spend less: why embedding parts can reduce overall systems costs even while bare-board prices rise.
Let's be clear on cost as it relates to bare PCBs. The IMS community--PCB manufacturers--will not sell boards at lower prices after adding process steps (and more-expensive materials), testing and verification, and experiencing lower yields and assuming greater liability. Sell the PCBs cheaper? It will never happen--not in North America, not in Europe and not even in Asia.
>From where does this notion come? The answer seems obvious. In the institutional EP driver language, lower cost is intended to imply lower system cost. To many, "system" is ignored or not understood, and mistaken as lower PCB costs. Can bare board costs be lower? Sometimes, conditions being just right. This makes the reduced system costs even more attractive. Are bare-board costs always lower? No. Can bare-board costs be higher and systems costs lower? Absolutely! That is typical, and that is what makes the cost driver work.
Embedding passive components can result in a more efficient PCB manufacturing process by increasing the number of boards on the panel. There are rare (emphasis on rare) instances where this alone can result in a lower unit cost of the bare boards.
In the bare circuit board manufacturing trade, we commonly say, "We don't build boards, we build panels." There are many standard panel sizes used in manufacturing, the most common being 18 x 24". I'll use that in this example. Since 0.75 to 1" of border is typical, the resulting usable board area is approximately 16 x 22". This border is for registration tooling holes (lamination, drilling, imaging), plating thieving, support and stability of innerlayers, product identification and traceability. Adding test coupons for IPC-6012 Class 2 or 3 microsections, impedance control, registration and IST will reduce the usable area to 16 x 20" or smaller.
Simply stated, the board cost equals the cost of materials, plus labor, overhead and profit. What are materials? There are direct materials--those that become the board; and there are indirect materials--those that are consumed in the process of making the board. Direct materials include laminate, prepreg, embedded passive materials, soldermask, legend ink, copper, and finishes such as solder, nickel, gold, tin, silver, etc. These have a predictable and known cost and are allocated to a specific product. Indirect materials, on the other hand, are consumed in the manufacturing process, are used for virtually all products, and their costs are typically allocated across all jobs on a percentage basis.
Let's look closer at panelization efficiency, i.e., the number of parts on the panel (number up). Since we manufacture panels, the bulk of the costs are associated with the panel and are only moderately affected by the number of boards on the panel. Hence, the greater the number of boards on the panel, the lower the unit cost. TABLE 1 illustrates the board size for a variety of numbers up. In this example, the panel is 18 x 24", has typical borders, IPC-6012 Class 3 coupon strips (two each), four-track impedance coupon (one each), and 0.1" board spacing. The "basis" board is prior to any reduction in surface area. The "minus" 10%, 20% and 30% represent reductions in surface area and the relative change in panel efficiency (number up).
TABLE 2 illustrates the surface area consumed by several standard SMT package sizes. TABLE 3 illustrates the total surface area used as a function of the quantity of SMT packages embedded. In short, SMT packages take up space.
With this information, assume that our initial design without embedding is an eight-layer 14.7 [in.sup.2] board. Analysis indicates that we are able to embed a total of 330 0603 capacitors and 330 0402 resistors. The total reduction in SMT surface is 4.1 [in.sup.2]. Assuming our board profile is reduced proportionately in the x and y dimensions, our resulting board will be 10.6 [in.sup.2]. The resultant panel efficiency increases by 20% to 24 up. Although the PCB unit price is proportional to the number up, it is not absolutely linear. We will assume, in this case, that the reduction in basis board price relates to 85% of the gain in panel efficiency, or equivalent to 23.4 up rather than 24 up.
The costs of embedding passives are tabulated in TABLE 4. First, let's look at the capacitors. Assume our analysis shows that the capacitors can be embedded using a high Dk planar material. To achieve the capacitance density required, it takes two layer pairs of this material in a power and ground configuration, with the power close to the surface, probably layer 2 or possibly even layer 1. The original design delivered power to the BGAs from a single power plane and returned through a single ground plane. To provide the required capacitance, an additional layer pair is necessary and will be designed as a parallel capacitor to the original P/G planes. The cost of processing this material is modestly higher than a conventional layer due to the thinness of the material. This is estimated at a 20% processing cost increase. If the basis cost of processing a layer is $10, then the added processing cost for the layer is $2. The added processing cost for the substitute layer is $2 plus the processing cost of $12 for the new layer, a total of $14. For the raw material costs, to keep the math simple, assume that the basic FR-4 raw material is $10 for a layer pair. The cost of the high Dk raw material is 4X the basic FR-4 dielectric used in the design. Then the added material cost for changing one layer pair to a high Dk laminate will be $40 for the additional layer pair material minus the original $10 allowance, a total of $30. The added material cost for the new layer pair will be $40, giving a total of $70 additional capacitor materials. Add the processing cost of $14 and we have a total of $84 materials and processing for the embedded capacitors.
We calculate resistor costs using similar logic. Assume that performance dictates the use of ceramic thick-film technology. All resistors can be designed and manufactured on a single layer using two paste values. Further, no additional routing signal layers are required. The added cost for materials and fabricating the CTF foil and core is $200. The added cost for trimming and testing the resistors is an additional $100. This includes layer test and trimming, plus final board resistance testing.
The total added cost per panel for embedding resistors and capacitors is $384.
Assuming that the basis board is eight layers and the panel added value selling price was $150, then the resultant panel (10 layers) would be $534. The basis unit price would be $150/20 or $7.50. With panel efficiency the embedded unit price would be $534/23.4 or $22.82, for an increase of $15.32 (204%) per board. The bare board costs more.
How could an IMS firm be expected to manufacture this board at a price below the basis board price? The board price cannot be below $22.82, a 204% increase. We have to look at the off-setting component and assembly costs. Assume that the average resistor and capacitor combined part price and assembly is 2 cents each. Since we are embedding a total of 660 parts, the assembly costs are $13.20. Adding this to our basis board price, the assembled passive board is $20.70. Now we are making progress. The embedded bare board price ($22.82), less the part and assembly cost ($13.20), is $9.62. This is $11.08 less than the conventional assembled passive board price--a 54% reduction.
So this is my message: Embedding 660 passive components may increase the bare-board unit price by more than 200% and at the same time reduce the assembled passive board cost by greater than 50%. That's cost reduction, folks. The IMS firms have to work harder, spend more on materials and processes, and take more risks to affect a significant systems--cost savings. Is there anything wrong with this picture? To me, it's fair compensation for honest work.
TABLE 1. Panel Efficiency NO. UP X Y AREA ([in.sup.2]) BASIS 1 15.45 20.11 310.7 4 7.67 10.00 76.7 20 3.62 4.07 14.7 40 2.88 2.50 7.2 -10% 1 14.68 19.10 280.4 4 7.29 9.50 69.2 20 3.44 3.87 13.3 42 2.74 2.38 6.5 -30% 1 13.13 17.09 224.5 4 6.52 8.50 55.4 24 3.08 3.46 10.6 54 2.45 2.13 5.2 -50% 1 10.97 14.28 156.6 6 5.45 7.10 38.7 35 2.57 2.89 7.4 72 2.04 1.78 3.6 TABLE 2. Package Areas PACKAGE PART SIZE (in) AREA ([in.sup.2]) * 0201 0.020 0.010 0.0032 0402 0.040 0.020 0.0051 0603 0.060 0.030 0.0074 0805 0.080 0.050 0.0118 * Including footprint, via pads and keep out area. TABLE 3. Multiple Package Areas AREA ([in.sup.2]) VS. QTY. OF PACKAGES PACKAGE 100 250 500 1000 0201 0.319 0.798 1.596 3.192 0402 0.509 1.273 2.546 5.092 0603 0.739 1.848 3.696 7.392 0805 1.183 2.958 5.916 11.832 TABLE 4. Cost of Embedding BASIS ADDER (%) ADDER TOTAL COST OF EMBEDDING CAPACITOR LAYERS Process thin material Existing P/G layer pair $10 20%/layer $2 New P/G layer pair $12 100% $12 Material New layer pair $40 100% $40 Replacement layer pair ($40 new material minus $10 existing material) $30 Total capacitor $84 COST OF EMBEDDING RESISTOR LAYERS Process foils and cores $150 Trim and test cores and test boards $150 Total resistor $300 Total embedding cost per panel $384 TABLE 5. System Costs X Y AREA ([in.sup.2]) BASIS SMT ASSEMBLED BOARD Board 3.62 4.07 14.7 Parts (660 @ $.012 ea.) $7.92 Assembly (660 @ $.008 ea.) 5.28 Total assembled passives with PCB $20.70 0.0% EMBEDDED BOARD 330 ea. 0402 1.68 330 ea. 0603 2.44 New board size 3.08 3.46 10.6 Price affect (85% gain) Capacitor panel cost Resistor panel cost Total embedded board cost OFF-SET COSTS Parts (660 @ $.012 ea.) 7.92 Assembly (660 @ $.008 ea.) $5.28 Total off-set EMBEDDED SYSTEM COST ORIGINAL SYSTEM COST NET SYSTEM COST REDUCTION #UP PANEL PRICE UNIT PRICE % CHANGE BASIS SMT ASSEMBLED BOARD Board 20 $150 $7.50 Parts (660 @ $.012 ea.) Assembly (660 @ $.008 ea.) Total assembled passives with PCB EMBEDDED BOARD 330 ea. 0402 330 ea. 0603 New board size 24 Price affect (85% gain) 23.4% Capacitor panel cost $84 Resistor panel cost $300 Total embedded board cost $532 $22.82 +204% OFF-SET COSTS Parts (660 @ $.012 ea.) Assembly (660@$.008 ea.) Total off-set $13.20 EMBEDDED SYSTEM COST $9.62 ORIGINAL SYSTEM COST $20.70 NET SYSTEM COST REDUCTION $11.08 -54%
RICHARD SNOGREN is a member of the technical staff at Coretec Inc. (coretee-inc.com). He can be reached at firstname.lastname@example.org.
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|Title Annotation:||Getting Embedded|
|Publication:||Printed Circuit Design & Manufacture|
|Date:||Dec 1, 2003|
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