# Neuro fuzzy controller for positive output KY boost converter to reduce output voltage ripple.

I. INTRODUCTIONAdvent of communication and computing gadgets such as Personal Digital Assistant (PDA), MPEG etc., necessitate the boosted output voltage for specific input voltage. For such applications, the designer has to be precise in considering the voltage ripple content, settling time and load transient response of the converter. Conventional non-isolated DC--DC boosting converters tend to cause large output voltage ripples. This can be overcome by using Equivalent Series Resistant (ESR) Capacitor [1] or by adding an inductance--capacitance (LC) filter [2]. However the operation of the converter under Continuous Conduction Mode (CCM) [3]-[9] leads to good load transient response by holding the right--hand zero in the transfer function for that mode which is complicated in practice. DC-DC converters are controlled using various techniques like coupling inductors [3], voltage control techniques [4]-[9], sliding mode converter [10] and loop bandwidth control [11] to reduce output voltage ripples. It is evident that these converters [3]-[9] has one right--half plane zero with CCM mode produces very good transient response which is difficult to achieve.

The KY boost converter [12]-[15] which is a recent development proposed by K. I. Hwu and Y. T. Yau operates in CCM while keeping the output current non-pulsating leading to reduced voltage stress across the output capacitor resulting low output voltage ripples in the order of few mV. In distinct with the non-isolated voltage boosting converters, KY boost converter produces a very good transient response in the order of few ms similar to Synchronous Rectified (SR) buck converter.

In this paper Neuro Fuzzy control technique is employed to control the output voltage of the KY boost converter. The performance parameters are estimated in time domain.

The converter along with Adaptive Neuro Fuzzy Inference System (ANFIS) is designed in the MATLAB Simulink model and the simulated results exhibit a reduction in output voltage ripple from existing ripple of mV to |aV with rapid settling time. The hardware implementation of the proposed system for the KY boost converter and the experimental results are discussed in following sections.

II. PROPOSED CONTROLLER SYSTEM

The proposed Neuro Fuzzy Controller for voltage regulation of Positive output KY boost converter is depicted by the block diagram in following Fig 1.

The main blocks of the proposed system are Positive output KY boost converter, comparator and Neuro Fuzzy controller and Pulse Width Modulation (PWM) generator. The comparator compares the output voltage ([V.sub.o]) of the converter with reference voltage ([V.sub.ref]) and yield the error (e) signal. The change of error with respect to time (ce) is calibrated. The error and change in error are fed as input to the Neuro Fuzzy controller. The output of Neuro Fuzzy is duty cycle (d), which is fed to PWM generator to produce switching signal which drives the KY boost converter. The following section describe the functioning of the KY boost converter and the design of proposed Neuro Fuzzy controller along with the output obtained through simulation and experimental results.

III. POSITIVE OUTPUT KY BOOST CONVERTER

The KY boost converter as shown in the following Fig. 2 is a combination of KY converter with SR boost converter.

The KY boost converter is a non-isolated converter and operates in CCM with voltage conversion ratio of 1 plus d, where d is the duty cycle produced by the controller, which is a time variant. It possesses inductors both in input and output sections, so that the output current ripples are very small, leading to low output voltage ripple around 300 mV. It is a combination of KY converter section combined with SR boost converter in which KY converter consist of two switches [S.sub.1], [S.sub.2], diode [D.sub.b], energy transferring capacitor [C.sub.b], output inductor [L.sub.o] and output capacitor [C.sub.o]. The input of KY converter is replaced by buffer capacitor [C.sub.m] in KY boost converter. The SR boost converter comprises two switches [S.sub.1] and [S.sub.2] with input inductor [L.sub.1] and the output of SR boost converter is replaced by buffer capacitor [C.sub.m]. Hence [C.sub.m] is a buffer between KY converter and SR boost converter forming the KY boost converter. This converter operates in CCM with two switches. Hence there are two modes of operation represented by mode 1 and mode 2.

The mode 1 operation of KY boost converter is depicted by the Fig. 3. In this mode the negative terminal of [C.sub.b] is grounded leading to forward biasing of Db as it is turned ON by switching ON switch [S.sub.2] and turning OFF switch S;.s Hence [C.sub.m] is discharged and [C.sub.b] is charged and the voltage across Li is vi there by magnetizing [L.sub.i] and [L.sub.o] is demagnetized. The current through Co is the difference between current through Lo and current through RL, and the current flowing through [C.sub.m] is the sum of -[i.sub.Cb] and -[i.sub.Lo] which is represented by the differential equations as given by (1).

The mode 2 operation of KY boost converter is depicted by the Fig. 4. In this mode [D.sub.b] is reverse biased as it is turned OFF by switching ON switch [S.sub.1] and turning OFF switch [S.sub.2]. Hence [C.sub.m] is charged and [C.sub.b] is discharged and the voltage across [L.sub.i] is the difference between [v.sub.Cm] and [v.sub.i], there by demagnetizing [L.sub.i] and [L.sub.o] is magnetized as the voltage across this inductor is the difference between [v.sub.o] and 2[v.sub.Cm]. The current through [C.sub.o] is the difference between current through [L.sub.o] and current through [R.sub.L], and the current flowing through [C.sub.m] is the difference between [i.sub.Li] and [i.sub.Lo] which is represented by the differential equations as given by (2):

[MATHEMATICAL EXPRESSION NOT REPRODUCIBLE IN ASCII] (1)

[MATHEMATICAL EXPRESSION NOT REPRODUCIBLE IN ASCII] (2)

The average value of voltage or current can be obtained from (3), where the variable x is a time varying quantity and represents voltage or current

[MATHEMATICAL EXPRESSION NOT REPRODUCIBLE IN ASCII] (3)

The averaged equations are obtained from (1)-(3) and represented by (4):

[MATHEMATICAL EXPRESSION NOT REPRODUCIBLE IN ASCII], (4)

where d is the duty cycle of PWM signal of switch [S.sub.2]. The voltage conversion ratio of the KY boost converter obtained is given by (5)

[V.sub.o]/[V.sub.i] = [2 - d]/[1 - d]. (5)

The specification of KY boost converter which we have taken in to account is depicted by the following Table I. We have considered the following specifications to simulate the results of the proposed control technique.

IV. NEURO FUZZY CONTROLLER MODELING

Adaptive Neuro Fuzzy Inference System (ANFIS) is the implementation of neural network architecture [16] in the inference engine of a Fuzzy controller. Figure 5 shows the proposed controller for KY boost converter with ANFIS controller [17]-[19] for a reference output voltage of 36 V. The input to ANFIS controller is error (e) in output voltage and change in error (ce); the output of the controller is duty cycle (d) which is fed to the PWM generation block whose switching frequency is 195 kHz and the output of which is the control signal (c) fed as switching signal for switch [S.sub.2] of the KY boost converter. The output voltage [V.sub.L] and output current [I.sub.L] values are stored in the MATLAB workspace by the sink "itr" as shown in the Fig. 4.

The KY boost converter realized in Simulink model is depicted by Fig. 6, whose input is PWM output control signal (c) fed as switching pulse (M) to the switch [S.sub.2] and the output voltage ([V.sub.L]) and output current ([I.sub.L]) are taken as output to the MATLAB workspace.

Figure 7 shows the PWM control signal generation block which generates control signal (c) from the duty cycle (d) obtained from ANFIS controller with a switching frequency of 195 kHz.

Figure 8 shows a general block diagram of ANFIS controller, where the Neural network is implemented in the rule base of the Fuzzy controller and Fig. 9 describes the general structure of a five layer four rule base ANFIS algorithm using first order Sugeno type Fuzzy--Neural network architecture with two input functions and one output function, whose input function is classified with 7 membership functions implemented during the creation of rule base.

The ANFIS structure [20] comprises three distinct layers namely input layer (Layer I); hidden layer (Layer II to Layer IV) and output layer (Layer V). The input layer namely Layer I consists of input membership functions [X.sub.1] and [X.sub.2] which transmit the input signal for classification through membership functions into fuzzy linguistic variables in Layer II. In this article ANFIS controller input variables are chosen as output voltage error (e) and change in error (ce); fed as input variables [X.sub.1] and [X.sub.2] respectively. The layer II consists of 14 nodes, as each input is classified into 7 membership functions to convert to fuzzy linguistic variables. The layer III comprises of 49 nodes, each node representing a fuzzy rule, denoted as rule layer whose function is to multiply the input signal and is denoted by the symbol n in Fig. 9. Layer IV consist of output membership functions comprising 49 nodes termed as sigmoidal layer whose node consist of nonlinear mapping imposing bounds on the signal to enhance the stability of the system. The output layer denoted by Layer V consists of output function represented by the symbol C in Fig. 9 which sums all the signals to acquire final inferred result.

The ANFIS controller implemented in this article is of the model described as above whose fuzzifier section comprise the input signals error (e) and change in error signal (ce) whose membership functions are selected as Gaussian membership function and are classified into seven functions namely Negative Big (NB); Negative Medium (NM); Negative Small (NS); Zero (ZE); Positive Small (PS); Positive Medium (PM) and Positive Big (PB). The defuzzifier section comprises the output signal which is the duty cycle (d) is considered as linear signal in ANFIS model with the classification of membership functions as assumed above. The membership function plots for the input variables e and ce are shown by the figures Fig. 10 and Fig. 11 respectively.

The input membership functions are mapped to the output membership function by 49 rules through grid partitioning method using FIS generator in MATLAB Simulink[R] ANFIS trainer and the ANFIS rule base model is portrayed by the Fig. 12.

The data sets to train ANFIS is obtained from workspace from the PID controller model in which data's namely output voltage error (e), rate of change of error (ce) and the corresponding duty cycle (d) are obtained by executing the PID controller model. The ANFIS model is trained with data sets obtained from the workspace by loading the data into ANFIS trainer and the data is then trained through back propagation technique for 50 epochs for minimum error tolerance. It is found that the error minimizes at epoch 33 during training and it is constant as depicted by Fig. 13.

The final ANFIS rule base surface view after training is depicted by the Fig. 14 as given below.

V. SIMULATION RESULTS

The results of the KY boost converter with input voltage 12 V; rated output voltage of 36 V and load current 2.5 A simulated with MATLAB Simulink R2011a is shown by the following figures from Fig. 15 to Fig. 17.

Figure 15 depicts the output voltage waveform of existing PID controller [12], [13] and proposed Neuro Fuzzy controller for a time period of 0.1 second. It is evident that the overshoot in PID output is reduced in Neuro Fuzzy controller output and the settling time of the output voltage is reduced to greater extent by the proposed controller and the measured settling time is 15 ms.

Figure 16 shows simulation result of the output voltage ripple for the proposed ANFIS controller in the time period of 0.3259 s to 0.3261 s. It clearly shows that the output ripple for an output voltage of 36 V is about 610 |aV which ranges from 36.00025 V to 36.00086 V.

Figure 17 shows the output current ripple waveform of proposed Neuro Fuzzy controller output for a time period of 0.0224 s to 0.0225 s which shows 100 ripple current in the simulation result.

Figure 18 shows the output current waveform of existing PID controller and proposed Neuro Fuzzy controller output for a time period of 0.1 s. It shows the reduction in overshoot and settling time of the output current in the proposed ANFIS controller output current waveform.

VI. HARDWARE IMPLEMENTATION

The hardware implementation for the proposed ANFIS controlled KY boost converter with the specifications mentioned in Table 1 is shown in Fig. 19.

The output of the KY boost converter is sensed by the voltage sensing unit by a potential divider and this analog signal is converter into digital signal by an analog-to-digital converter from which current output voltage is calibrated by the microcontroller which estimates the error and change in error from which it implements the Neuro Fuzzy control algorithm and produce corresponding duty cycle from which PWM signal is generated which controls the switching action of the KY boost converter.

Figure 20 shows the output voltage ripple waveform of proposed Neuro Fuzzy controller output in hardware realization. The ripple is around 500 | V in the hardware output shown in channel 2 waveform with switching frequency of 195 kHz for a corresponding duty cycle of 54.7% for PWM switching signal shown by channel 1 as shown in the output picture.

Figure 21 shows the output current ripple waveform of proposed Neuro Fuzzy controller output in hardware realization. The ripple is around 200 | A in the hardware output shown in channel 2 waveform with switching frequency of 195 kHz.

VII. CONCLUSIONS

In this paper a Neuro Fuzzy controller is employed to improve the performance of positive output KY boost converter and the results of the controller illustrate decrease in overshoot, reduce in settling time and decrease in output voltage ripple. The back propagation technique is implemented for training the ANFIS controller with the results obtained from the resulting values of the PID controller. The resulting output values of the proposed Neuro Fuzzy controller are compared with the existing controller output in the following Table II. The minimization of output voltage ripple from 200 mV of existing PID controller to 500 [micro]V in the proposed Neuro Fuzzy controller is validated through hardware output. Further improvements in KY boost converter output can be achieved by implementing various optimization techniques in the controller.

http://dx.doi.org/10.5755/j01.eee.19.8.2351/

Manuscript received September 1, 2012; accepted September 17, 2013.

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[20] S. Karthikumar, N. Mahendran, "Modelling of Neuro Fuzzy Controller for Negative Output KY Boost Converter Voltage Ripple Reduction", Elektronika ir Elektrotechnika (Electronics and Electrical Engineering), vol. 19, no. 6, pp. 47-50, 2013.

S. Karthikumar (1,2), N. Mahendran (3)

(1) St. Peter's University, Chennai, India

(2) AP/EEE, Saveetha University, Chennai, Tamilnadu, India

(3) Department of Electrical and Electronics Engineering, Mahendra College of Engineering, Salem, Tamilnadu, India

karthic.phd@gmail.com

TABLE I. SPECIFICATIONS OF KY BOOST CONVERTER. Parameter Symbol Value Unit Input voltage [V.sub.i] 12 V Rated output voltage [V.sub.o] 36 V Rated load current [I.sub.o] 2.5 A Output and Input Inductance [L.sub.o], 15 [micro]H [L.sub.i] Buffer capacitance [C.sub.m] 1000 [micro]F Energy transferring capacitor [C.sub.b] 680 [micro]F Output capacitor [C.sub.o] 470 [micro]F Load resistor [R.sub.l] 14.4 [ohm] Switching frequency [f.sub.s] 195 kHz TABLE II. COMPARISON OF EXISTING AND PROPOSED CONTROLLER OUTPUT. Parameter Existing PID Proposed Neuro controller Fuzzy controller Settling time 65 ms 15 ms Output voltage ripple 200 mV 500 [micro]V

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Author: | Karthikumar, S.; Mahendran, N. |
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Publication: | Elektronika ir Elektrotechnika |

Article Type: | Report |

Geographic Code: | 9INDI |

Date: | Aug 1, 2013 |

Words: | 3294 |

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