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Nanofabrication: how small can devices get?

The future of electronics lies increasingly with circuits and devices fabricated with critical dimensions (CDs) that are measured in nanometers.

To make devices on this scale, the fabrication process itself becomes the object of extensive research and development. Fabrication of microelectronic circuits typically involves exposing a radiation-sensitive material, or resist, that coats the material to be patterned. Sections of the resist, forming a pattern, are then chemically modified through interaction with exposing radiation. The resist is then developed and the resulting pattern is either transferred to a metal or used to form a mask for etching the underlying substrate.

Key components of current nanofabrication research are electron-beam (e-beam) lithography and dry etching. Steered e-beam lithography is essential both for patterning semiconductors directly (direct write) or for making masks for projection and contact lithographies (mask making).

The smallest features currently made have been defined by direct-write methods, but mask making is essential for future production lithographies, such as those using x-ray, deep-UV, and optical sources.

The technology of lithographic tools is such that the smallest feature sizes are limited by the physics of the fabrication process rather than the capability of the tools. However, advances in our understanding of these physical limits and ways to circumvent them are being made. Some aspects of this work are described here.

The resolution of e-beam lithography tools is not simply the spot size of the focused beam. It also is affected by scattering of the e-beam in the resist and backscattering by the substrate, which exposes the resist over a greater area than the beam spot size.

Correcting for these scattering effects is computationally intensive and time consuming due to the high device densities involved. A particular problem is compensating for overexposure caused by backscattered eletrons during exposure of the lithographic pattern (proximity effects).

Efforts for development of procedures for fabricating nanometer-size structures are concentrated on controlling and understanding these phenomena rather than on developing smaller spot sizes.

Increasing the energy of the electron beam may be one way to correct this problem. Higher energy beams reduce scattering in the resist and create a more diffuse fog of backscattered electrons from the substrate.

However, correction for proximity effects remains a significant problem, particularly for mask making. Current tools employ voltages up to 100 kV and are complex and expensive. We and researchers at Stanford (CA) Univ. are pursuing an alternate approach by using extremely low energies, where scattering effects are eliminated or spatially confined.

Focusing these e-beams, however, is increasingly more difficult as the energy is lowered, due to the aberrations of the focusing lenses.

Our group and other researchers at IBM, Yorktown Heights, NY, and Stanford Univ. have been able to expose resists with low-energy electrons (15 to 50 eV). Using our STM, we have written patterns with 23-nm features in the developed resist.

This is more than four times smaller than can be written, on the same substrate and in the same resist, with a tightly focused 50-kV e-beam. With an STM, the feature size is maintained regardless of pattern geometry, indicating an absence of proximity effects.

Furthermore, the resist patterns are sufficiently robust to be transferred into the underlying semiconductor by wet or dry etching methods, indicating that the technique has technological significance.

Another intriguing lithographic application of the STM is the selective oxidation of Si and GaAs. John Dagata, a researcher at the U.S. National Institute of Standards and Technology, Gaithersburg, MD, has demonstrated that patterns can be written directly onto suitably prepared surfaces of these materials, which are robust enough to withstand dry etching.

A great virtue of the STM-based technique for creating spatially confined e-beams is its simplicity. Low voltages are employed, and the STM design is compact. In contrast, high-voltage electron-optic columns for lithography tools are more complex, less reliable, and have more maintenance problems associated with their operation at 100 kV (or higher).

Progress also is being made in developing more conventional electron optics that operate at low voltages, typically 0.5 to 2 kV. Since many electron-optic aberrations scale with size, microfabrication techniques have been used to build miniature electron columns. An IBM research group led by Philip Chang, at Yorktown Heights, is developing an STM aligned-field emission (SAFE) microprobe to produce an e-beam less than 10-nm dia in the low-kV range.

The SAFE microprobe's low voltage operation and its compact size ofter potentially greater payoffs in terms of increased reliability, lower maintenance, and lower capital costs.

Lithography, of course, is only the first step of the nanofabrication process. Once a pattern is defined in the resist, it must be transferred onto the substrate as accurately as possible. The best results have been obtained with dry etching. The sample is etched by ions in a reactive-gas environment that is designed to optimize the etch of the material.

As with e-beam lithography, the resolution is not simply defined by the capability of the process itself. With care, structures can be etched with physical dimensions that are limited only by the lithographic pattern.

However, energetic ions can cause electrical damage that renders the material nonconductive even where it is not etched away, especially in III-V materials, such as GaAs. Another problem is that GaAs energy bands can be pinned at the surface creating a nonconductive surface layer.

These two effects make CD control in an etched structure very difficult. For example, GaAs structures can be made so small that these effects render the entire structure nonconductive and electronically uninteresting.

Efforts at understanding these problems include using optical spectroscopy, which is particularly suited to studying etch-induced electronic damage. It is contactless and can be performed in situ during etching. Two techniques we found useful in studies of dry etching are Raman spectroscopy and photoreflectance spectroscopy.

Raman allows us to determine the free-carrier density within the penetration depth of the incident photons. This allows measurement of the depth of the nonconductive surface layer (depletion depth).

To complete the picture, the determination of the pinning potential of the energy bands at the surface is critical, as this also changes the depletion depth. We obtained this directly from photoreflectance measurements.

GaAs can be etched with a mixture of an inert gas, such as argon, and a reactive gas, such as chlorine or boron trichloride. The reactive gas etches the GaAs by forming volatile reaction products. The argon ions sputter the less volatile reaction products formed at the etched semiconductor surface.

The energetic argon ions penetrate below the surface and create electronic damage in the form of displaced atoms. This damage can be significantly reduced if only the reactive gas is used. However, this will require development of cleaner etching systems. Background impurities, such as water vapor, can contaiminate the surface and cause etch nonuniformities.

It is clear that the dimensional limits for fabricating electronic materials on a nanometer scale have not been reached. Limits due to basic physical processes are apparent; however, research is leading to an understanding of these processes and discovery of methods to overcome or circumvent current limitations. Major challenges remain in the research and manufacturing areas.

Christie R.K. Marrian, Elizabeth A. Dobisz, and Orest J. Glembocki are members of the Nanoelectronics Physics Section at the Naval Research Laboratory, Washington. Their work is sponsored by the Office of Naval Research, the Office of Naval Technology, and the Defense Advanced Research Projects Agency through their lithography programs.
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Title Annotation:microelectronic devices
Author:Marrian, Christie R.K.; Dobisz, Elizabeth A.; Glembocki, Orest J.
Publication:R & D
Date:Feb 1, 1992
Words:1230
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