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NEC Electronics announces VR4101 MIPS RISC CPU; powerful processor targets PDAs, other products.

MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Aug. 15, 1996--NEC Electronics Inc. Thursday introduced the VR4101 microprocessor, a high-speed, low-power consumption 64-bit MIPS RISC solution.

Compact and powerful, the VR4101 chip is ideal for personal digital assistants, notepad-type devices, battery operated information units, digital cameras, set-top boxes, printers, and many other applications.

The VR4101 processor offers up to 132 MIPS/Watt performance at 3.3 V. The device offers direct memory access (DMA) and several peripheral circuit interfaces, and offers 64-bit MIPS RISC processing power at less than $25 per unit in volumes of 100,000.

The device is the most integrated solution currently available from NEC's microprocessor offerings, and gives designers the ability to create leading-edge portable devices.

"The VR4101 processor offers system designers power without penalty, in terms of performance, power consumption, and price," said Ray Newstead, senior manager of VR-Series marketing for NEC Electronics Inc.

VR4100 Series Benefits

The VR4101 processor is the first product of NEC's VR4100 core strategy and the latest addition to NEC's broad line of VR-Series processors. NEC's core strategy for the VR4100 Series offers customers the option of either a modular ASSP (Application-Specific Standard Product) or a customer-driven ASCP (Application-Specific Custom Product) solution based on the flexible, powerful VR4100 processor.

NEC plans to leverage its vast ASIC library, containing nearly one thousand peripheral modules as well as the company's leadership in core and process technology, to provide customers a full range of solutions based upon the VR4100 processor core. Also, NEC has recently put a U.S.-based design team in place, which will help customers quickly create designs based on the modular VR4100 family.

(For more information on the VR4100 core strategy, please see accompanying news release, dated Aug. 19, 1996.)

VR4101 Processor Features

Built using NEC's 0.35-micron drawn (0.28-micron effective) CMOS process, the VR4101 device has a die size of 6.5 x 6.5 millimeters. The device has an operating voltage range of 3.0 to 3.6 V. The internal clock operates at 33 MHz.

The VR4101 device has a five-stage pipeline running at 33 MHz. The device includes a 64-bit instruction set (the CPU can also can run 32-bit applications) and provides a maximum of 33 million multiply/add instructions per second. The device delivers 33 VAX MIPS at 33 MHz, with a performance-to-power ratio of 132 MIPS/Watt at 3.3 V. It supports the MIPS III instruction set (without FU, LL and SC instructions) and is also compatible with MIPS I and II.

Power consumption is typically 250 milliwatts (mW) at 33 MHz, 3.3 V. The VR4101 processor also offers three power saving modes. Standby mode, which freezes the pipeline clock, typically requires only 30 mW of power at 33 MHz. Suspend mode freezes both the pipeline and bus clocks, and typically requires only 10 mW of power. Hibernate mode freezes the internal Phase Locked Loop (PLL) in addition to the pipeline and bus clocks, and typically requires just 240 uW of power.

The device incorporates cache memory (2 kilobytes for instruction, 1 kilobyte for data) as well as a high-speed multiply-and-accumulate (MAC) unit and a memory address management unit.

Optimized for Mobility

The VR4101 processor is particularly well suited for use in personal digital assistants (PDAs), organizers, and other mobile battery-operated devices. In addition to its power management features, it integrates peripherals for access to LCD screens, keyboards, infrared and serial I/O, audio interface, touch panel interface, and DMAs.

Another PDA-oriented feature is the MAC component of the VR4101 CPU. The MAC enables DSP-like instructions, so that using software emulation, the VR4101 device can act as a modem chip as well as the CPU. This saves a manufacturer cost, space and power in developing a communications-enabled portable device without a separate modem or communications chipset.

Packaging, Pricing and Availability

The VR4101 processor is packaged in a 160-pin plastic quad flat package (PQFP). Production is planned to reach 300,000 units per month by October 1996. The VR4101 will be priced at less than $25 per unit in quantities of 100,000.

NEC's VR-Series Microprocessors

NEC licenses the MIPS RISC technology from MIPS Technologies Inc. Using this technology, NEC manufactures the VR-Series line of high-performance microprocessors. The company offers a broad line of MIPS-based microprocessors including the VR4000, VR4100, VR4200, VR4300, VR4400, VR5000 and VR10000, which comprise NEC's 64-bit RISC offerings.

About NEC Electronics

NEC Electronics, with headquarters in Mountain View, designs, manufactures and markets an extensive line of electronic products including ASICs, microprocessors and microcontrollers, 3D graphics processors, digital signal processors (DSPs), memories and components, including flat panel displays.

In 1995, the company ranked fourth in semiconductor sales in the United States (a) and second in the world. The company operates a 676,000-square-foot manufacturing facility in Roseville, Calif. NEC Electronics is an affiliate of NEC Corp. (NIPNY), a $41 billion international manufacturer of computer, communications and semiconductor products. -0-
 NEC VR4101 Processor Technical Information


Description Low-power 64-bit MIPS RISC microprocessor


Chip Size and Process 6.5 x 6.5 millimeters; 0.35-micron process


Features MIPS III instruction set, without FPU, LL,
 and SC instructions.
 Five-stage pipeline running at 33 MHz.
 Incorporates cache memory, high-speed
 multiply and accumulate unit (MAC),
 address management unit.
 Incorporates many peripheral circuit
 interfaces: serial, keyboard, audio,
 IrDA, touch panel, real time clock.


Architecture 64-bit; can run 32-bit applications


Speed 33 MHz


Performance 33 VAX MIPS@33 MHz


Power Consumption 250 mW at 33 MHz 3.3 V (typical)
 Supports three types of power management
 at 33 MHz, 3.3 V: Standby (30 mW)
 Suspend (10 mW) Hibernate (240 uW) (typical)


Pipeline Frequency 33 MHz


ISA compatibility Compatible with MIPS I, II, and III + MADD
 inst.


System interface 32-bit SysAD bus


Peripheral Circuits/
 Interfaces Serial, 64-key keyboard, IrDA (infrared),
 touch panel, real-time clock, audio
 interface, 8MB DRAM, 16MB mask ROM, 5-
 channel DMA controller, ISA bus-subset bus


Data Formats Supported Doubleword (64 bits), word (32 bits),
 halfword (16 bits), byte (8 bits)


Memory Management Unit 32-bit physical addressing range of
 4 gigabytes. Supports 32-bit and 64-bit
 addressing modes


Cache Memory 2-kilobyte instruction direct-mapped on
 chip; 64-bits wide. 1-kilobyte data cache
 (writeback) direct mapped on chip. No
 secondary cache.


Packaging 160-pin plastic quad flat package (PQFP)


Cost Less than $25 per unit in quantities of
 100,000-0-


NOTE TO EDITORS: NEC, VR-Series, VR4000, VR4100, VR4200, VR4300, VR4400, VR5000, VR10000 are registered trademarks or trademarks of NEC Corp. MIPS is a trademark of MIPS Technologies Inc. All other trademarks are the property of their respective holders.

(a) According to Dataquest.

CONTACT: Reader Contact:

NEC Electronics Inc., Mountain View

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800/366-9782 phone

800/729-9288 fax

or

Media Contacts:

NEC Electronics Inc., Mountain View

Jim Lucas, 415/965-6620

jnlucas@el.nec.com

or

Cohn & Wolfe

Michael Goldstein, 310/226-3094

michael_goldstein@yr.com
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