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Mentor Graphics introduces Mentor EZ-VIP PCI Express Verification IP.

WORLDWIDE COMPUTER PRODUCTS NEWS-December 8, 2014-Mentor Graphics introduces Mentor EZ-VIP PCI Express Verification IP

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Mentor Graphics Corp (Nasdaq: MENT), a provider of electronic hardware and software design solutions, declared on Monday that its new Mentor EZ-VIP PCI Express Verification IP is now available.

The company said its new Verification IP (VIP) eliminates several time-consuming steps in the testbench assembly process. PCIe EZ-VIP is designed to help engineers reduce the time spent building testbenches by providing re-usable building blocks for common protocols and architectures. It reportedly reduces testbench assembly time for ASIC (application-specific integrated circuit) and FPGA (field-programmable gate array) design verification by a factor of up to 10 times.

According to Mentor, PCIe EZ-VIP includes pre-packaged, easy-to-use verification environments for the serial and parallel interfaces of PCIe 1.0, 2.0, 3.0, 4.0 and mPCIe, which can be used to verify PHY, Root Complex and Endpoint designs. Test plans, compliance tests, test sequences and protocol coverage are all included as SV and XML source code, which allows simple re-use, extension and debug. In addition, Mentor VIP components include a comprehensive set of protocol checks, error injection and debug capabilities.

Price details were not disclosed.

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Publication:Worldwide Computer Products News
Date:Dec 8, 2014
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