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MOTOROLA ANNOUNCES POWERPC SOFTWARE TOOLS ON THE SUN 4 PLATFORM

 BURLINGAME, Calif., Oct. 18 /PRNewswire/ -- Motorola's (NYSE: MOT) RISC Microprocessor Division today announced the immediate availability of PowerPC 601 and 603 software cross-development packages on the SUN 4 platform. The toolkit, consisting of highly-optimizing C and FORTRAN compilers, simulators, and a source-level debugger, is already available on the IBM RS/6000 platform.
 Motorola's PowerPC microprocessor family, jointly developed by Apple (NASDAQ-NMS: AAPL), IBM (NYSE: IBM), and Motorola, is being designed into high-performance cost-effective computers, including notebooks, desktop, workstations, and servers. PowerPC chips are based on a reduced instruction set computing (RISC) architecture, and incorporate leading-edge technologies and processes from both IBM and Motorola. By increasing the early availability of critical PowerPC software development tools, Motorola is enabling key software and system vendors to port their existing applications and develop new products without having to make significant changes to their existing development environments.
 "Motorola is committed to expanding the PowerPC architecture over a broad range of computing platforms," said Anne-Marie Larkin, Motorola's director of RISC software. "By providing a comprehensive suite of software tools that can be used on both the SUN 4 and RS/6000 platforms, we will be able to better meet the computing needs of this high-performance marketplace."
 Software tools available for the PowerPC Family include the Software Development Package (SDP), the C and FORTRAN compilation systems, and an Architectural Simulator. In addition to being hosted on multiple platforms, these Motorola tools are being developed to support multiple operating system environments, which will further ease the task of software developers who plan on targeting several PowerPC systems.
 The SDP package includes Motorola's highly optimizing C and FORTRAN compilers, which share a state-of-the art common core optimizer that adheres to industry standards for producing highly portable executables. Also included in the SDP is source level debugger, which reduces software development time, and an Architectural Simulator, which enables developers to create and test software in a virtual PowerPC environment prior to the availability of hardware platforms.
 The Motorola C and FORTRAN compilation systems for the PowerPC Family provide a powerful set of software development tools ideally suited for the requirements of RISC microprocessors. Key features include full ANSI-compliance and common language extensions, as well as the capability to optimize performance for several implementations of the PowerPC architecture with a single compilation environment. The compilers currently support assembly language generation and the XCOFF object file format, and will support the ELF format in the near future. Code generated by the compiler can be easily integrated with the GNU PowerPC source-level debugger and the Motorola simulators.
 The SDP bundled toolkit -- including the C and FORTRAN compilers, Architectural Simulator, Assembler and Loader, and Debugger -- is priced at $5,000. Individual prices for the C and FORTRAN compilers start at $1,500 each, and at $3,500 for the Architectural Simulator.
 PowerPC is a trademark of International Business Machines Corporation.
 -0- 10/18/93
 /CONTACT: Dean Mosley of Motorola, 512-891-2839; or Malinda Banash or Anne Nason of Cunningham Communication, 617-494-8202, for Motorola/
 (MOT AAPL IBM)


CO: Motorola; Apple Computers; IBM Corporation ST: California IN: CPR SU: PDT

SJ-CM -- NE004 -- 3214 10/18/93 09:14 EDT
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Publication:PR Newswire
Date:Oct 18, 1993
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