Printer Friendly

In case you missed it.

Component Fabrication

"Layer-by-Layer Removal of Graphene for Device Patterning"

Authors: A. Dimiev, D. Kosynkin, A. Sinitskii, A. Slesarev, Z. Sun and J. Tour; tour@rice.edu.

Abstract: The patterning of graphene is useful in fabricating electronic devices, but existing methods do not allow control of the number of layers of graphene that are removed. We show that sputter-coating graphene and graphene-like materials with zinc and dissolving the latter with dilute acid removes one graphene layer and leaves the lower layers intact. The method works with the four different types of graphene and graphene-like materials: graphene oxide, chemically converted graphene, chemical vapor-deposited graphene, and micromechanically cleaved ("clear-tape") graphene. On the basis of our data, the top graphene layer is damaged by the sputtering process, and the acid treatment removes the damaged layer of carbon. When used with predesigned zinc patterns, this method can be viewed as lithography that etches the sample with single-atomic-layer resolution. (Science, March 4, 2011)

Laminates

"Laminate Resistance to Pad Crater Defects: Comparative Spherical Bend Testing"

Authors: John McMahon and Brian Gray; jmc-mahon@celestica.com.

Abstract: Newly developed laminates have different curing processes, are commonly filled with ceramic particles or micro-clays and can have higher Tg values. These changes, aimed at improving the materials resistance to thermal excursions and maintaining electrical integrity through primary attach and rework operations, have also had the effect of producing harder resin systems with lower fracture toughness. Celestica has been conducting an ongoing testing program to assess Pb-free-compatible materials in combination with area array packages against the currently accepted levels of process strain established when the dominant and limiting failure mode was interfacial fracture in complex intermetallic compound layers at the solder/package interface. This program has identified pad crater/pad lift as the dominant failure mode in Pb-free materials and, as a result, has modified internal guidelines for process strain limits, which reflect an increased sensitivity to strain rate. Test methods, results and failure analysis are discussed. (SMTA Pan Pac Symposium, January 2011)

Package-on-Package

"Over-Molded Electronics and Printed Hybrid Systems" Authors: J.T. Makinen; K. Keranen, Ph. D.; T. Alajoki; M. Koponen; Antti Keranen, Ph. D.; A. Kemppainen; and Kari Ronka, Ph.D.; jukka-tapani. makinen@vtt.fi.

Abstract: Several examples built show the potential of polymer packaging. In one, an optoelectronic module had optical structures directly molded on top of a rigid circuit board with packaged and bare wire-bonded LED chips. Protection of bare chips and shaping of the optical illumination and imaging structures was accomplished in a single process step. The integrated module is used as an add-on lens to a cellphone camera, and it functions as a mobile microscope. Another example is a laminated structure with embedded LED chips. Element thickness is 0.3mm, and the flexible stack of foils can be bent in one direction. Applications for this structure range from backlight illumination to large area displays. The combination of printed flexible PCBs and injection molding has also been demonstrated with several functional modules. The first example, named the "ice-scraper," illustrates the potential of origami electronics, which can be cut and folded to 3-D shapes. It shows that several manufacturing process steps can be eliminated by printed hybrid systems technology. A second structure, the optical touch screen, shows the benefits of this combination in relation to size, ruggedness and conformance. Arrays of LEDs and optical detectors were embedded inside a thin plastic plate with 3-D shape. The device is ideally suited for medical applications, as the sensitive electronic components are well protected inside the plastic, and the panel can be cleaned easily because it has no joints or seams that can accumulate dirt or bacteria. (SMTA Pan Pac Symposium, January 2011)

Plating

"Innovative High Throw Copper Electroplating Process for Metallization of PCB"

Authors: Maria Nikolova, Ph.D., and Jim Watkowski; mnikolova@macdermid.com.

Abstract: Using an innovative DC plating technique, a reliable through-hole copper metallization can be achieved. The parameters of this plating technique have been studied and are presented. Excellent throwing power in PCB through-holes and blind microvias are achieved. Two formulas are developed. Copper distribution is superior across the PCB for the two formulations. Plated copper is bright, smooth and leveled, especially inside the through-holes, including at low CD, 5ASF. Plated copper exhibits excellent ductility and tensile strength. The process is easily controlled by CVS analysis and Hull cell tests, and can be applied to both panel and pattern plate. (SMTA Pan Pac Symposium, January 2011)

This column provides abstracts from recent industry conferences and company white papers. Our goal is to provide an added opportunity for readers to keep abreast of technology and business trends.
COPYRIGHT 2011 UP Media Group, Inc.
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2011 Gale, Cengage Learning. All rights reserved.

Article Details
Printer friendly Cite/link Email Feedback
Title Annotation:TECHNICAL ABSTRACTS
Publication:Printed Circuit Design & Fab
Date:Apr 1, 2011
Words:769
Previous Article:SI-based TIM.
Next Article:The cost of misunderstanding standards.

Terms of use | Privacy policy | Copyright © 2020 Farlex, Inc. | Feedback | For webmasters