IDT introduces new family of high-performance LVDS fan-out buffers.
This functionality provides controlled switchover to the back-up clock without generating glitches that can cause system failures--a key capability to ensure increased system reliability in high-performance communications applications such as routers and access equipment. With a 25 ps maximum skew, the new IDT LVDS fan-out buffers offer the industry's most precise clock-signal alignment.
Using CMOS technology, the IDT LVDS fan-out buffers operate at a 1 GHz clock speed, and are available in output versions of 1:6, 1:10 and 1:16. The devices offer interface I/O translation and can accept HSTL, LVEPECL, LVPECL, LVDS, CML and LVTTL input signals.
"There is an ongoing need to increase reliability in high-performance communications systems. As a result, designers are continually seeking next-generation solutions to satisfy their evolving design requirements," said Kevin Walsh, director of strategic marketing for the IDT timing and logic divisions. "The IDT LVDS fan-out buffers increase system dependability by providing redundant clocking with a mechanism to eliminate glitches when switching from one clock to another. Our expertise in timing technology, coupled with our desire to anticipate and satisfy the needs of leading communications companies, makes IDT a perfect fit for this marketplace."
The IDT LVDS fan-out buffers with glitchless switchover range in price from $5.95 to $9.50 each, in 10,000-piece quantities. Other devices within the family range in price from $4.50 to $7.95 each, in 10,000-unit quantities. The parts are available now.
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|Title Annotation:||low-voltage differential signaling|
|Publication:||EDP Weekly's IT Monitor|
|Date:||Nov 17, 2003|
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