Hot spots and heatsinks: because the time to uncover your board's steamy side is before it can fail the 'smoke test.'.
Remember, there is always a solution to heating issues we encounter during electronics design. The key is to identify the heat sources prior to building the boards. Some companies have the luxury of adding fans or changing heatsinks or heat pipes, but it is always our desire to get it right the first time.
One difficulty is that hot spots are not always obvious in the early design phase since few studies report them to the general public. Companies that discover certain design subtleties like to keep them private. You can't blame them; they spent the money to figure them out in the first place. Over the past few years we've seen a few such subtleties more frequently, so let's discuss these hot spots and how to manage them.
First we'll identify the main culprits behind our heating issues: components. They are fairly well characterized, although there is room for improvement in the area of standardization for theta j-c, theta c-b and theta j-a and how they are determined. The components are typically the major power dissipaters and for years have been the focal point when discussing PCB thermal management. It helps to understand how each company calculates the values they include in their specifications for each of the thermal parameters.
I still recall the first time that I studied theta j-c values and found that the measurements can be done in an oil bath, suspended in air or mounted to a thermally grounded heatsink. All of those configurations are different and it is not clear whether they produce the same result. This was an issue in the past because we were looking for some margin in a design. The main point is that the values are specified and used at face value, and there is not much guesswork at the component level.
The only thing that can be done at the initial design stage, with respect to components, is to spread the big dissipaters out and get them as close to the mounting points as possible. The electrical design engineer will dictate placement for performance, but should consider the thermal aspects of the design. In Dave S. Steinberg's book "Cooling Techniques for Electronic Equipment," he writes in the preface, "MIL-HDBK-217 shows that the failure rates of many types of electronic components can double when there is a 20[degrees]C rise in the hot spot temperature for components that are operating at about 50% of their rated power." A 20[degrees]C rise can easily occur if we are not careful.
One way to approach thermal problems is to use a thermal budget. Guidelines can be written to define generalized rules of thumb for a specific environment and board configuration. The guidelines should be created by taking the mounting configuration, environment, number of copper layers, power dissipation and power density into consideration.
Beginning with the hottest components, we need package information and power dissipations. Pay attention to the total power in the design and the power density, or watts per square inch. For example, we have a power hybrid that is dissipating 10 W; the theta j-c is 1.5[degrees]C/W; the case-to-board thermal resistance for this example is 2[degrees]C/W; and our worst-case environment is 55[degrees]C. Using that information we have a junction-to-board temperature rise of 35[degrees]C ((theta j-c + case-to-board) * 10 W). Keeping the maximum junction temperature to 105[degrees]C or less gives us a maximum board temperature of 70[degrees]C (105-35[degrees]C).
Now we'll look at the temperature difference between our maximum board temperature and our worst-case environment. There's only 15[degrees]C left to work with to transfer the heat from the board to the environment. We have some margin considering that there will be convection from the component, but we'll keep that in our pocket. Our concern at this point is the temperature rise at the board level due to the rest of the components and other contributing heat sources.
The temperature rise of the board will be a function of the power dissipation in the board and the power leaving the board from conduction, convection and radiation. The first step to lowering the board's temperature rise is to minimize the thermal resistance in the board by using the existing copper and not etching it away.
As a first cut at the board temperature you can look at the total power and power density. These are the key elements in electronics temperature management. The other part of the problem is the location of the power and the path it has to take to the sink. I won't go into too much detail, but we'll illustrate the significance of the thermal resistance in the board between the heat source and the heatsink. In this case, heatsink is referring to the mounting points on a hoard. The thermal resistance is defined by Equation 1:
R = L/kA
L = the length of the heat transfer path, k = the material thermal conductivity and A = the cross-sectional area that we are transferring through.
Parallel resistance calculation is shown in Equation 2:
[R.sub.T] = 1/(1/[R.sub.1]) + (1/[R.sub.2])
A significant difference is seen when comparing the thermal resistance (R) through a circuit board of bare dielectric material with the thermal resistance of a board utilizing a copper plane or another highly thermally conductive material ([R.sub.T]). TABLE 1 illustrates this comparison. A unit length and width are used as a simple example. The table shows how a small amount of thermally conductive material can change the thermal properties of a circuit hoard.
The thermal resistance values in the first column depict the contribution in thermal resistance from each material. When the parallel path is determined between the two materials, you can see that the highly thermally conductive material is the main contributor to lowering the thermal resistance. Simple calculations like this help give you insight into where your hot spots will be and where to focus attention in your design.
Aside from components, some other areas that have not been problematic in the past are becoming more so now. Some of those areas are the power planes, traces, vias, thermals and high-current pulse transients. We will not discuss vias, thermals or high-current pulses, although they are areas that could benefit from more design research.
Power Planes, Connectors and Conductors
Determining the temperature rise in power planes can be difficult, especially on boards with many vias and oddly shaped copper. This makes it hard to maintain a reasonable cross-sectional area throughout the plane to guarantee that the temperature rise will be minimal. The key is to place those necked-down areas as far away from the hottest components as possible and keep as much copper on the area's other layers to help spread the heat.
Planes and the Swiss-cheese effect have been problems for many people. Fortunately there are analytical methods to solve the problem and some excellent tools for determining temperature rise. These tools have proven themselves against problems and have performed very well.
The analytical method is simple and can be handled with any finite element or finite difference analysis tool. It does take some creativity, however, but with time I'm sure there will be specific tools to handle the problem. Software companies such as Harvard Thermal have developed tools that allow designers to read in the CAD database, components, planes, traces, vias, connectors, etc. This type of software permits the user to solve PCB thermal analysis and airflow problems.
We're also seeing heating issues around the connectors in copper planes. It is not uncommon to find a pin or two on a row where a thin web needs to carry high current between pins. There are a lot of pins and plated through-holes that help spread the heat, but those thin webs can be hot spots. Power is also dissipated inside the connector. Connector pins--male-female interfaces--have an electrical resistance associated with them. The interface resistance will increase as the connectors are mated and de-mated, as well as increase as the lead material oxidizes. The difficulty lies in estimating how much the resistance will increase over time. The point is that the connectors and the I/O copper webs are heat sources that should be accounted for in the thermal budget and some number of watts should be delegated to those areas. A watt here and a watt there add up quickly.
Parallel conductors also have seen their share of hot spots cropping up. There seems to be some confusion over parallel conductors and how to manage them. By definition, from IPC-2221 and going back to the original text from the National Bureau of Standards work in 1956, "For groups of similar parallel conductors, if closely spaced, the temperature rise may be found by using an equivalent cross-section and an equivalent current. The equivalent cross-section is equal to the sum of the cross section of the parallel conductors, and the equivalent current is the sum of the currents in the conductors."
[FIGURE 1 OMITTED]
It is important to realize that parallel conductors are not only side by-side, but also above and below each other on layers throughout the board. In addition, if the current is high enough, traces that cross perpendicular to each other can also create hot spots. Typically, they will not be an issue. The primary area of concern regarding parallel traces is traces side-by-side, as well as above and below each other. Obviously, keep an eye on transformers and coils built into the layers of the board. Autorouters may or may not be capable of setting design rules for the high-current traces, so make note of them and adjust where necessary. There must be more emphasis on parallel conductors as we continue to see current increase in our applications.
Hot spots occur as a result of a concentration of power dissipation in the board. They can be managed by paying attention to the high-current traces and making sure they are routed in the board with space between them. In addition to keeping the high-current traces routed apart, try to keep as much copper on each layer as possible. I've heard complaints regarding capacitance issues, but that is one of the compromises that will need to be evaluated.
Many designs will keep copper fill on every layer and have extra plating in vias for both current and thermal reasons. Copper's thermal conductivity is 1,000 times better than common dielectric materials, and it draws heat away from hot spots very well. If you have no reason to etch it away, why not leave it?
Managing the temperature rise in the board comes down to estimating the power dissipation in the components and taking into account the additional power dissipated in the board due to planes, traces and connectors. The design that grabbed my attention had 24 W of power from the components and an additional 8 W from the internal copper.
Good luck with your designs.
TABLE 1. Thermal resistance values for various dielectrics and conductors MATERIAL THERMAL LENGTH WIDTH THICKNESS CONDUCTIVITY (in) (in) (DIELECTRIC) (W/in-C) (in) FR4 0.0076 1 1 0.058 Aluminum 4.2 1 1 FR4 0.0076 1 1 0.058 Copper 9.8 1 1 FR4 0.076 1 1 0.058 Graphite composites 90 1 1 Thermally conductive prepregs 0.076 1 1 0.058 Aluminum 4.2 1 1 Thermally conductive prepregs 0.076 1 1 0.058 Copper 9.8 1 1 Thermally conductive prepregs 0.076 1 1 0.058 Graphite composites 90 1 1 MATERIAL THICKNESS AREA THERMAL TOTAL (CONDUCTOR) ([in. RESISTANCE RESISTANCE (in) sup.2]) (C/W) (C/W) FR4 0.058 2268.60 111.13 Aluminum 0.002 0.002 119.05 FR4 0.058 2268.60 49.90 Copper 0.002 0.002 51.02 FR4 0.058 2268.60 5.54 Graphite composites 0.002 0.002 5.56 Thermally conductive prepregs 0.058 226.86 78.08 Aluminum 0.002 0.002 119.05 Thermally conductive prepregs 0.058 226.86 41.65 Copper 0.002 0.002 51.02 Thermally conductive prepregs 0.058 226.86 5.42 Graphite composites 0.002 0.002 5.56
MIKE JOUPPI is president of Thermal Man Inc. (www.thermalman.com), which has developed a trace heating database and tools to access it. Jouppi is scheduled to speak at PCB East in October. He can be reached at firstname.lastname@example.org.
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|Title Annotation:||Thermal Management|
|Publication:||Printed Circuit Design & Manufacture|
|Date:||Oct 1, 2004|
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