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Fpga interface board fib3.

Contract notice: Fpga interface board fib3.

Developed by the GSI Darmstadt FPGA Interface Board FIB2 represents a key component of LLRF electronic modules of amplitude and phase-locked loop systems with radiofrequency cavities that are needed in GSI / FAIR RF systems, represents. Increasing demands on the performance of these control loops in FAIR synchrotron and storage rings can FIB2 push the limits of performance. Under the tender, the FAIR project will now be an updated and significantly more powerful successor version FPGA Interface Board FIB3 of initially 100 pieces in series designed and manufactured. The previously a production of 3 prototypes will be made. The client (GSI) reserves the right to 8 x 25 piece draw as options. The PCB FIB3 is used across systems in low-level control loops of the FAIR-HF systems for synchrotron and storage rings.

This contract is divided into lots: no

Deposits and Guarantees required: Are under a contract to be concluded inputs required (Deposit), these are paid only on production of an unlimited, absolute bank guarantee.

The GSI in principle only accepts guarantees that comply with the following minimum conditions

- Absolute guarantees waiving the defense of 770, 771 BGB;

- Exclusively guarantee under German law;

- Irrevocable guarantees;

- Free for GSI;

- Issued by a well-known international, preferably European Bank;

- Usually a permanent basis or a time limit, which is linked to the date of transfer of ownership.

Time limit for receipt of tenders or requests to participate: 30.3.2016 - 14:00

Language(s) in which tenders or requests to participate may be drawn up: German. English.


Address : Planckstrae 1

64291 Darmstadt

Contact point(s): Projekteinkauf

For the attention of: Frau Jana Schmidt

Country :Germany

Email :

Url :

Tender notice number : 64867-2016

Notice type : Tender Notice

Open date : 2016-03-30

Tender documents : T32270201.html

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Publication:Mena Report
Date:Feb 26, 2016
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