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Flip chip packaging: a hot topic: flip chip technology appears to be one bright spot in the electronics industry after a difficult year.

With almost every segment of the industry looking for positive signs this year, flip chip packaging is proving to be a bright spot for semiconductor companies, substrate makers and integrated circuit (IC) package contract assembly houses. Flip chip can be found in computers ranging from high-end systems, such as workstations, servers, mainframes and supercomputers, to personal computers--both desktop and mobile, as well as network system and telecommunications products.

Even with slow growth for electronic systems in certain segments, a continued demand for high performance packaging exists. Flip chip interconnect can be found in a variety of consumer products, including mobile phones, camcorders, personal digital assistants (PDAs) and watches--products where form factor is key. Presentations on flip chip have been a hot topic at recent conferences. At the IEEE/EIA Electronic Components and Technology Conference this year, approximately 17 percent of the papers were devoted to flip chip, while 13 percent of the papers at the IMAPS International Symposium on Microelectronics focused on flip chip technology. Flip chip has also been the focus of many workshops, including an IMAPS workshop held in Austin, TX, this summer.

New Flip Chip Packages

For several years, flip chip has been the interconnect solution for central processing unit (CPU) systems from AMD, Intel and Motorola. These companies have also expanded the use of flip chip into personal computer (PC) chipsets, with products from Intel shipping in increasing volumes this year. In addition to this expansion, an increasing number of new semiconductor products are being introduced with flip chip interconnect.

The adoption of flip chip in many applications is driven by performance needs and the ability to achieve smaller die with a flip chip design--smaller die translates into a greater number of die per wafer. Texas Instruments, Motorola and Analog Devices are increasing shipments of high performance digital signal processors (DSPs) with flip chip inside laminate packages (FC-PBGAs). Shipments of application specific integrated circuits (ASICs), with flip chip interconnect, are also increasing. Programmable logic device makers, such as Altera and Xilinx, are beginning to provide high-end products in flip chip packages.

Graphic chipmakers have also introduced new semiconductor products packaged using flip-chip interconnects inside plastic ball grid arrays (PBGAs). ATI Technologies, for example, has introduced new graphics products in a multi-chip PBGA with flip chip interconnect. PMC-Sierra has announced a second generation of products using flip chip interconnect for network system applications. Flip chip solutions have been introduced in PMC-Sierra's 10 Gigabit Ethernet XENON[TM] family of devices and the company's OC-48 and OC-192 transport optimized CHESS-III chip set. Amkor provides the contract assembly services for PMC-Sierra's flip chip products.

Large Die Sizes

Solder-bumped devices in high-end applications differ dramatically in size, performance and reliability requirements from many wire-bonded devices. For high performance applications, the die sizes are typically large, the power dissipation great and the input/output (I/O) counts high. K&S Flip Chip Division, for example, has bumped leading edge die with I/O counts of 5,000 and 20 mm x 20 mm die sizes. With increasing die sizes, 300 mm wafer bumping is also becoming a hot topic.

Increasing Number of Substrate Suppliers

Today's substrate choices include both laminate and ceramic. A few tape-based packages are also offered. Compass and Toppan Printing have targeted the flip chip market with multi-metal-layer solutions. For laminate substrate makers, providing flip chip for high performance applications is an opportunity for higher margins than that for wire bonded packages. Wire bond packages have provided such small margins that many substrate makers may have difficulty maintaining profitability. Suppliers of laminate substrates for flip chip ICs include: AMITEC; ASE; CMK; Compeq; Fujitsu; Hitachi Chemical; Ibiden; IBM; JCI; Kinsus; Kyocera; Matsushita Electronic Components; Mitsui Chemicals; NanYa; NTK; Phoenix Precision Technology (PPT); Samsung Electro-Mechanics; Shinko Electric; Toppan/NEC (new joint venture); 3M (formerly W.L. Gore's substrate division); and UMTC. Additional companies are expected to enter the market--for example, Unicap has announced future plans for flip chip substrate production using an additive or semi-additive process with capabilities for 20 [micro]m lines and spaces.

Growth in a Variety of Pin Counts

TSMC has seen a major growth in the number of flip chip designs, as have other foundries. As a result, major contract assembly houses, such as Amkor, ASE and Siliconware (SPIL), have also experienced growth in their flip chip business. Solectron has seen several designs for multichip packages with flip chip interconnect. Shipments of lower pin count products are also seeing growth. Several companies are offering flip chip on lead-frame packages, including AIT, Amkor, Carsem and Toshiba. These packages are cost-driven developments and take advantage of the established infrastructure. According to Carsem, power management or radio frequency (RF) devices are some of the major applications. Customers are driven to get the maximum die size, within a given package footprint, with improved electrical performance. A 60 to 300 percent larger die can be assembled in the same package by switching from wire bond to flip chip. Bumping houses, such as Unitive, have seen growth in a variety of pin counts.


Flip chip interconnect is seeing a dramatic increase in shipments. The market is finally becoming a reality as a result of performance and form factor drivers, coupled with infrastructure developments. Many development programs, while experiencing slight delays as a result of the economic recession, remain focused on future volume applications. An increasing number of devices of all types will soon be bumped.

Handbook Highlights Flip Chip

The Area Array Interconnection Handbook, edited by Karl Puttlitz and Paul A. Totta, traces the history of flip chip. With more than a thousand pages, the book, published by Kluwer Academic Publishers, deals with bumping, test, assembly, underfill, substrates and reliability issues.

E. Jan Vardaman is president of TechSearch International, Austin, TX; e-mail:
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Title Annotation:On the Forefront
Author:Vardaman, E. Jan
Publication:Circuits Assembly
Geographic Code:1USA
Date:Nov 1, 2002
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