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FUTURE AS/400s TO GET PARTITIONING, FAULT TOLERANCE.

The next major release of AS/400 hardware and software is expected to include yet more mainframe-class features, as IBM continues to push the mid-range box as an option for large customers who aren't religious about mainframes or Unix servers that think they are mainframes. The next generation AS/400s are likely to be announced along with OS/400 Version 4 Release 4 in May 1999. IBM could, of course, make announcements earlier in the year at the Common midrange trade show in March or, as it has done in the past two years, at the Lotusphere event that usually takes place in February. Techies in IBM's Rochester Labs were certain that May was the announcement date for V4R4 when they spoke to Computerwire, but IBM changes its mind as conditions dictate. According to IBMers we spoke with, OS/400 V4R4 was in code freeze in August and its associated Pulsar PowerPC chips have been running in the labs since then, too. Tom Jarosh, AS/400 general manager, also backs up what we have heard, although he dances around exact announcement dates. What he will say is that during the first half of 1999, new AS/400s will be announced and that they will include support for logical partitioning akin to the kind of support IBM mainframe customers have enjoyed for a decade. AS/400 customers with SMP models will be able to carve up the memory, disk and processing capacity contained in their AS/400 processor complexes into mini logical AS/400s that are completely isolated from each other. This means that a company that currently has three separate AS/400s -- perhaps they are in three European countries running three different languages and currencies -- will be able to consolidate those jobs on a single big AS/400e, something that could save them a lot of money. In the second half of 1999, IBM will announce the first phase of fault tolerant clustering for AS/400s, and beyond that, IBM will add support for standard Fibre Channel server area network connections. IBM plans to add 16-way and 24-way processors to the AS/400 line. The first generation of Pulsar chips may or may not use IBM's copper and SOI CMOS process technologies out of the gate. More details, Barbed Wire.
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Publication:Computergram International
Geographic Code:1USA
Date:Nov 30, 1998
Words:380
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