Emerging VLSI Technologies and Architectures: Proceedings.
Emerging VLSI technologies and architectures; proceedings.
IEEE Computer Society symposium on Emerging VLSI Technologies and Architectures (2006: Karlsruhe, Germany) Ed. by Jurgen Becker et al.
Computer Society Press
Sixty-four regular papers and 28 posters from the March 2006 symposium present recent research on system-on-chip issues, nano-electronics, VLSI circuits, reconfigurable system design, high-performance circuits, and physical design. The contributors propose a porting methodology that guides the reuse of analog IPs, a service-time-stamp computation circuit for WFQ packet scheduling, and an adaptable receiver architecture for the WCDMA downlink UMTS standard. Other topics include optimization of the HAS-2 family of hash functions on FPGAs, a space saving layout for passive components, finite state machine implementation with single electron tunneling technology, and a programmable logic array structure based on quantum-dot cellular automata. No subject index is provided.
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|Publication:||SciTech Book News|
|Article Type:||Brief Article|
|Date:||Jun 1, 2006|
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