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Embedded passives: debut in prime time: wherever there is a strong need for improved electrical performance, space reduction, EMI reduction or reliability improvement, utilization of embedded passives will be found.

The foundation of embedded capacitance in printed circuit boards (PCBs) started in the late 1960s. In U.S. Patent No. 3,519,959, the concept of embedded distributed capacitance (closely-spaced power and ground planes for power supply &coupling) was disclosed. In the patent, two layers of embedded distributed capacitance were used. Each embedded distributed capacitor utilized 0.0025-inch thick epoxy glass and two-ounce (0.0025 inch) copper. The use of even thinner and higher performance embedded distributed capacitance material is disclosed in U.S. Patent No. 4,560,962, filed in 1983. In this case, one-ounce (0.0014 inch) power and ground planes separated by epoxy-glass dielectric as thin as 0.001 inch is disclosed.

Both these patents are expired, and the teachings disclosed in them, such as the concept of embedded distributed capacitance, are now public domain and able to be practiced broadly. Many OEM designers and PCB fabricators had no awareness of the prior art in the area of embedded distributed capacitance and had a poor understanding of patents. The combination of these two items was a significant impediment to the use of high-performance embedded capacitor laminates prior to 2004.

The interest in embedded passives, especially embedded capacitance, took off in the 1990s. High-speed digital products, with large numbers of ICs switching simultaneously, were seeing a combination of noise and EMI issues due to much faster rise times and lower operating voltages. Portable consumer products, such as cell phones, digital still cameras and camcorders, needed to reduce size and weight while still meeting EMI requirements. Many military/aerospace products had the combination of high performance requirements required by high-speed digital products and the same space and weight constraints seen in portable products. Since the drivers for military/aerospace products were not cost driven, it is easy to see why military/aerospace products were some of the early adopters of the high-performance embedded capacitor (and resistor) technology.

Some of this early interest resulted in an approved DARPA proposal by 3M in 1996. The goal was extremely high-capacitance densities, which could be used in PCBs and MCMs in military products. Both thin-film metal oxides and ceramic-filled polymers were studied over a four-year period. However, it became apparent that ceramic-filled resins, especially barium titanate--filled epoxies, offered the best combination of performance, reliability and PCB fabrication compatibility, as well as the quickest path to commercialization.

At this same time, StorageTek was trying to organize an industry consortium of material suppliers, PCB fabricators and OEMs to study high-performance embedded distributed capacitance materials. The consortia would mitigate the technical resources and funding required to study embedded capacitance in detail. This resulted in the NCMS Embedded Decoupling Capacitance (EDC) consortia. Five embedded capacitor materials, including the 3M embedded capacitor material, were investigated as power-ground cores in multilayer rigid boards. One goal was to confirm that embedded capacitor materials were compatible with all facets of PCB manufacturing, including design, fabrication and reliability testing. Another goal was to determine if the embedded capacitor materials would provide better electrical performance than surface-mounted capacitors, and if so, by how much.

The results were presented to the industry in a final report issued in 2000 (1). It showed that most embedded capacitor materials were compatible with standard PCB processing, had similar reliability results to existing commercial thin, high Tg FR-4 laminates and required very minimal changes in the OEM design or in panelization of the design at the PCB fabricator. Ultra-thin materials (4 [micro]m to 8 [micro]m) with a high Dk were shown to provide excellent electrical performance, much better than surface-mount capacitors or the commercial 2-mil FR-4 material that was being used as a baseline (FIGURE 1 and FIGURE 2).







The consortia provided the initial performance and reliability data that significantly increased the interest in high-performance embedded distributed capacitor laminates and paved the way for a larger follow-up industry consortia on embedded passives. The NIST Advanced Embedded Passives Technology (AEPT) program started in 1999, and the scope of this project was both embedded resistor and capacitor materials, including capacitor functions beyond decoupling.

The NIST AEPT program looked at compatibility of embedded resistor and capacitor materials with non-standard (at that time) PCB fabrication processes, such as laser drilling. Some of these materials were found to be easily laser drilled and compatible with the microvia metallization process (FIGURE 3).

Another important part of the program was to ensure that high-performance embedded capacitor materials could receive UL recognition at the desired levels.

At the end of the program, all three OEMs involved built product emulators with the 3M embedded capacitor material. The product emulators from Nortel, Compaq and Delphi were 10-Gb optical transceiver modules, a PDA and an engine control module (ECM) respectively. All three product emulators were successfully produced by PCB fabricators in the consortia. They were found to be fully functional when tested at the system level, even though a large number of discrete &coupling and/or filter capacitors had been removed from the board surface. The Nortel transceiver module, Compaq PDA and Delphi engine control module (ECM) board are shown in FIGURES 4, 5 and 6, respectively.

In the case of the Nortel transceiver module, the use of embedded capacitance (and resistance) was responsible for reducing the number of layers from 18 to 14, while improving signal integrity by 20%. In the case of Compaq, 74 discrete capacitors were removed from the board surface, while still improving electrical performance. In the case of Delphi, it was shown that an on-engine ceramic module could successfully be replaced by an organic module with embedded capacitors (and resistors). Results were released in a final report to the industry in 2003, and presented in an industry seminar that same year. (2)

Limited Fab Experience and Supply Base

By 2004, the electrical performance, PCB fabrication compatibility and reliability work done by OEMs such as StorageTek, Nortel, Delphi, Compaq, Sun, H.P. and UL had confirmed the expected electrical performance results on active designs, proven that large number of discrete capacitors could be successfully removed from the board allowing large space reduction and that embedded capacitor laminates had excellent long-term reliability.

Also in 2004, the publication of a Printed Circuit Design & Manufacturing magazine article, "The History of Embedded Distributed Capacitance", greatly increased the industry's knowledge in the area. (3) The combination had mitigated most of the industry's concerns regarding embedded capacitor laminate materials. However, at the start of 2004, the overall experience of PCB fabricators, especially outside of North America, was very limited. At this time, only 28 fabricators had any experience processing the 3M material. Approximately 25% gained knowledge from participation in the NCMS EDC and NIST AEPT consortia. Of the 28, only nine were from outside of North America, with six from Asia and three from Europe.

By the end of 2008, the number of board fabricators who had successfully processed the 3M material was approximately 100, with approximately 40% of these being in Asia, 40% in North America and 20% in Europe (FIGURE 7).

Lack of Physical Layout and Simulation/ Modeling Software

Initially, the lack of physical layout and simulation/modeling software was not a large barrier for embedded capacitor materials because most applications utilized only embedded distributed capacitance. The physical layout was straightforward, replacing the existing thick, low Dk dielectric power and ground planes with very thin, high Dk dielectric power and ground planes of the same design.

If there was a need to determine how many decoupling capacitors could be removed with the use of embedded distributed capacitance, the typical route was to fully assemble the embedded capacitance board and start removing capacitors until you were happy with the performance and the number of caps removed. This process was fine for implementing embedded capacitance on existing designs, the standard practice when initially investigating the technology. However, as designers desired to implement embedded capacitance on next-generation designs, there was a need for simulation/modeling tools to determine power integrity and how many decoupling capacitors would be needed, as designers did not want to design in unnecessary SMT pads, traces and vias.

The very limited software tools available to designers for embedded passives were identified as a large gap early in the NIST AEPT program. (4) Even though a few software providers were involved in the program, not much progress was made during its course. The EDA providers did not want to invest a large amount of resources and funding into the creation of software to support embedded passives until there was a known market. This created a chicken-or-the-egg scenario because designers needed the EDA tools to scale up to large volumes.

In the course of the NIST AEPT consortia, much of the physical layout of the singulated embedded passives was done manually. Fortunately, as the use of embedded passives has increased over the last five years, so has the number of available EDA providers and software tools. Today, there are a number of both physical layout and simulation/modeling software tools available.

Improved Discrete Caps and Cost Concerns

Cost concerns are almost always a major hurdle in new technology commercialization, and embedded passives were no exception. From 1998 to 2001, the cost of embedded capacitor bare boards was much higher than the cost of boards without embedded capacitors, due to low volumes, low yields at the embedded capacitor material suppliers and lower yields on embedded capacitor boards during PCB fabrication. This was expected, as the technology was new and very few board fabricators had experience handling thin flexible materials.

Even though embedded capacitance was initially a significant cost adder, the products that really needed it, such as military/aerospace and high-end telecom/computing equipment, could afford the technology. As a result, many OEMs went forward with qualifying the technology. Just as some of the telecom OEMs were ready to implement embedded capacitance into their designs, the telecom bust occurred. Programs slated to use embedded capacitance were either scrapped or went forward with less expensive standard technology.

Also, the discrete component manufacturers were not sitting idle. They could see that embedded passives were a serious threat and continued to not only decrease the costs of discrete components, but also package much more capacitance into the same volume. Additionally, they were able to fabricate smaller components to facilitate designers' space requirements.

By 2003, a large percentage of the embedded capacitance market was no longer available due to cost pressures. Embedded passive material suppliers needed to improve their productivity and yields to become more competitive. The yields of embedded capacitance boards at the PCB fabricator also had to be comparable to standard product, while market segments beyond military/aerospace, telecom and high-end computing had to be investigated.

During this time, the telecom and high-end computing market showed signs of life and once again began to use high-performance embedded capacitance materials in their rigid multilayer boards. However, only the higher-end products could typically justify the higher increased costs of embedded capacitance technology. These same companies also started investigating embedded passives for high performance chip packages as well. The use of high-performance embedded capacitance materials significantly increased in military/aerospace products, including backplanes and modules, and other market segments, such as medical, began to use these materials in higher volumes.

The use of high-performance embedded capacitance has continued to increase year-over-year. By 2008, it was being used or scaled up in moderate- to high-volumes in essentially every market segment because its high capacitance density is a good fit for use in small modules.


It has been a very long time coming, but high-performance embedded passive materials have finally hit the mainstream. Designers across the globe have specified it for use, and PCB fabricators in at least 14 different countries have successfully used the material. It has been or is being used in backplanes, rigid, flex, rigid-flex, modules and chip packages. Wherever there is a strong need for improved electrical performance, space reduction, EMI reduction or reliability improvement, utilization of embedded passives will be found.

A recent survey conducted by Printed Circuit Design & Manufacture (5) indicated that 11.1% of responders utilized embedded passive technology. The study also found that by 2008, 24.6% of the responders indicated they planned on utilizing embedded passive technology in their designs.

Having worked on embedded passives since 1996 and lived through the slow, painful growth of the technology, I feel proud to have been a part of the development, commercialization and scale-up of high-performance embedded passives technology. However, if it weren't for OEMs such as Compaq, Delphi, H.P., Nortel, Sun and StorageTek; PCB fabricators such as Litton Interconnect and Merix; and material suppliers such as DuPont, MacDermid and 3M, it would have taken considerably longer. PCD&F


(1.) Embedded Decoupling Capacitance (EDC) Project Final Report, December, 2000. National Center for Manufacturing Sciences, Ann Arbor, Michigan

(2.) Nortel Presentation, NIST Advanced Embedded Passives Technology (AEPT) Industry Seminar, January, 2003.

(3.) Joel S. Peiffer, "The History of Embedded Distributed Capacitance;' Printed Circuit Design & Manufacture, August 2004.

(4.) Advanced Embedded Passives Technology (AEPT) Program Report, September, 2003. National Center for Manufacturing Sciences, Ann Arbor, Michigan.

(5.) Mike Buetow, "2007: The Year of HDI?" Printed Circuit Design & Manufacture, January 2007

JOEL S. PEIFFER is an advanced engineering specialist with 3M Electronic Solutions Division;
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Author:Peiffer, Joel S.
Publication:Printed Circuit Design & Fab
Date:Oct 1, 2009
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