Design modeling checks and balances: should you use 3D field solvers or measurement-based modeling methods for high-speed modeling? Actually, they work great together.
A fairly simple structure consisting of an SMA launch and stripline trace will be used here to demonstrate the method of implementing a design technique of combined 3D solver and measure-based modeling methods. The measure-based methods use time-domain data such as TDR and TDT measurements, and a novel tool for design optimization and verification.
When data signaling rates rise to above 2.5 Gbps, and edges transition in less than 150 ps, even a stripline trace is not simple to measure. We take impedance measurements on PCBs for granted. However, to extend the usefulness of these measurements, it is necessary to not only know the true impedance profile of a trace, but also to know precisely signal delay and the impact of features (vias, pads, connectors, packages, etc.) upon the propagation of signals.
Available 2D field solvers, such as Ansoft Maxell 2D, are capable of extracting highly accurate models for the characterization of trace impedance, delay and loss modeling and characterization. But a 2D solver cannot account for nonuniform 2D structures such as diverging diagonal differential traces at a connector, or 3D structures such as packages, balls, connectors and vias. For these more complex structures, 3D field full-wave field solvers such as the CST Microwave Studio are necessary. These solvers are capable of extracting highly accurate models for these difficult 2D and 3D structures.
If we assume that we accurately know and understand the PCB manufacturing process, the dimensions of all interconnect features, and characteristics and properties of all materials, then these advanced solvers can be used for precise modeling and optimization of circuits for highest performance, enhanced design margin, and lower cost. However, there are uncertainties.
It is an assumption that we "know" materials" characteristics and fully understand how PCB conductors and dielectrics are fabricated. It is also an assumption that the tools used in modeling and simulation are "correct." Many a designer has been fooled by invalid assumptions, and many a design has been fabricated just to find that these assumptions produced an incorrect result, with reduced interconnect performance, increased crosstalk and noise, large impedance mismatches, and unaccounted-for effects. Measure-based modeling tests these assumptions and provides a path of further refinement of both the design and the design process.
Equally, it is an assumption that any given real system can be measured precisely and accurately. At some point, the test equipment (a TDR in this case) will need to be connected to the circuit under test. A suitable tool that provides the ability to de-embed up to the structure to be tested, along with the ability to address modeling issues using the collected data, is necessary. Models derived from carefully collected data can reveal issues with the launch or transition to a signal on a PCB. Strengths of measure-based modeling methods also include the ability to quickly assess the differences between sample launches.
The following is a list of launch pathologies and how they can be addressed by both measure-based and 3D solver techniques:
1. Ringing (resonance) occurs. Ringing will distort the impedance measurement until it settles down. For measurements of short traces and objects, like connectors and packages, ringing of the launch may totally obscure the behavior of the interconnect under test. Comparison of solver techniques and time-domain modeling requires a true impedance profile since ringing can be masked by multiple reflections in very high-speed systems.
2. The available measurement bandwidth is reduced. In terms of frequency, a bad launch will reduce the maximum frequency range that can be characterized. This may tender a specific test impossible, such as the evaluation of the frequency response of a cable being tested. By isolating and modeling the launch, it is possible to determine rise-time degradation due to the launch separately from losses due to signal traces.
3. Rise time is degraded. In the time domain, edge rates are degraded. Reduced rise time of a TDR pulse will significantly limit the ability to accurately discern and measure small features, such as vias, pads, stubs, component packages, connectors and even repetitive features in cables.
4. The test system is no longer transparent. A high-speed test system should be transparent. For this to occur, the bandwidth (or edge rate) of the test equipment, cables and PCB launches should be significantly greater than that of the bandwidth to be measured.
Measure-based methods validate the assumptions of electromagnetic field solver-based modeling and simulation. Material characteristics are not always homogenous, and the complex shapes of even simple SMAs require some level of approximation. Fabrication and assembly create a new set of variables that require verification using measure-based techniques. Correspondence of the two approaches enables "tuning" for the field-solver parameters. Correspondence of the technique also garners confidence in the design process.
No Free Launch
With infinite patience, time and resources, you can place an SMA connector on a board and confirm with measurements a bad launch. Then, based upon experience, hunches or careful discernment, corrections can be made to the layout for the next go-around. (Microwave and RF engineers have used this technique for years, with microstrip designs often tweaked by careful application of the Dremel tool.) Repeated iterations may lead to a better launch, or a worse launch, but probably not the optimal launch. Or, with good measurement equipment and software tools and a 3D full wave field solver and simulator, the infinite loop of iterate-measure-iterate-measure-iterate can be cut to a few quality cycles.
With advanced 3D parametric modeling something as "simple" as an SMA connector mounted on a PCB can be fully characterized, modified and optimized for best performance, given the current known assumptions about the PCB and manufacturer. After fabrication, measurements can be used to test, verify and either confirm or modify the working assumptions. With software and measurement techniques, overall measurement accuracy and bandwidth can be better than doubled. With these techniques, TDR measurements of less than 10 ps can be routinely made, for accurate interconnect characterization.
Field solver methods. FIGURE 1 shows the geometry for the optimized design of a top-launch SMA connector. Features such as grounding vias and their spacing, via diameter, via pad diameter and via anti-pad clearance rings can be easily parameterized, modeled and simulated. Multiple values for each parameter are swept and optimized, converging on the highest possible performance. Rather than use trial-and-error "guesses," software is used to estimate, model, simulate, measure and iterate the virtual design. Once optimization is complete, and the design has been fabricated, measurement equipment and software can be used, first to confirm or deny the simulation results, and second to accurately model the interconnect.
[FIGURE 1 OMITTED]
TDR measurements of the initial design subsequently confirmed the simulated field solver results. TDR verification of the electromagnetic simulations is a key to building confidence in further optimization trials. FIGURES 2 and 3 show the before and after simulated TDR profiles of the initial and optimized connector launch pattern. The original launch shows significant ringing which causes large impedance variations across the connector transition (49 to 57[ohm]), rise-time degradation, and ultimately a reduction in measurement performance. The optimized launch pattern shows significantly reduced ringing and a reduced impedance variation of 49 to 50.5[ohm]. This translates to a doubling of the launch bandwidth, enabling measurement to 20 GHz and beyond.
[FIGURES 2-3 OMITTED]
Comparing structures with Measure-based methods. Generating a true impedance profile is usually the first step in the measure-based modeling process, since it indicates how the topology of the model should be constructed. It is also an important step in evaluating and comparing different structures; this can be dune even before a suitable model is generated and simulated. For example, FIGURE 4 illustrates a bad launch where the true impedance profile, or Zline, varies from 25 to 68[ohm] and there are major capacitive and inductive impedance discontinuities. The initial capacitive discontinuity matches the topology of the launch since a long and wide via was used for the SMA launch. Some tools can be used to both de-embed the TDR stimulus to the DUT SMA-stripline trace and generate a true impedance profile from the voltage profile reported by the TDR instrument. Even in simple cases, multiple impedances generate reflections that mask the true impedance profile making it impossible to model with distributed or lumped components.
[FIGURE 4 OMITTED]
Measure-based behavioral modeling. Behavioral models accurately represent the time and frequency domain behavior of the interconnects up to the bandwidth of the acquiring TDR instrument. FIGURE 5 is an example of modeling the SMA launch and the entire signal path through another board via a connector. A total of five measurements were required, including reflected, transmitted and easily acquired reference waveforms. The extracted Spice-compatible model consists of 100 poles/zeros in this case. Excellent correspondence can be seen between these extracted simulated results and the transmitted (TDT) and reflected (TDR) data from the four waveforms as shown in FIGURE 6.
[FIGURES 5-6 OMITTED]
Topological measure-based modeling. Topological models differ from behavioral models in several aspects. Fundamentally, topological models retain the geometries mapped to the model and behavioral do not. They are, however, often more time-consuming to generate. FIGURE 7 illustrates model simulation results of a TDS8000 mainframe and an 80E04 TDR sampling head for the SMA structure. In Figure 7, the green plot represents the output of the field solver and the blue plot is the simulation results. The structure's peak in the resonance was accurately modeled along with the 25 ps periodicity. The source needed to be de-embedded carefully with an 85052D Agilent Calibration Kit open load source, since the open load of the SMA short cable resonated more than that SMA launch we intended to model. Typically this is not required for 12 GHz bandwidth specified models and below. In this case we were after very high frequency simulation--a 25 ps period is 40 GHz! All modeling using either frequency or time domain are limited by the measurement capability and associated methods, and not typically by the software tool.
[FIGURE 7 OMITTED]
The combination of solver-based modeling methods and measure-based modeling methods is formidable. Modeling, simulation and measurement are each enhanced when we combine them into an advanced design methodology. Measurements and measured model extraction can be used for the modeling of existing systems, but for future designs, our methods are most efficient when we do not have to build test prototypes every time.
When we use measurements to test modeling assumptions and tool accuracy, we provide unsurpassed calibration to the design process. At the simplest level, a TDR pulse may be compared between simulation and measurement. But for more advanced performance studies, a measure-extracted behavioral Spice model is used in simulation to compare with field solver modeled results. This provides the feedback to "close the loop" for confirmation of, and correction to, the modeling assumptions. Once solver methods have been verified through measurement, confidence in the final results increases. Ultimately, design iterations can be reduced, and total development cycles are decreased.
Used together, field solver and measure-based methods forma potent combo. In the authors' opinion, the one-time cost of software, test equipment and process development is offset by the costs of multiple design spins, design failures and longer time-to-market.
SCOTT MCMORROW is the president and founder of Teraspeed Consulting Group LLC (teraspeed.com). He can be reached at email@example.com. ALFRED P. NEVES is an applications engineer for TDA Systems Inc. (tdasystems.com). He can be reached at Alfred.firstname.lastname@example.org.
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|Title Annotation:||Design Modeling|
|Author:||Neves, Alfred P.|
|Publication:||Printed Circuit Design & Manufacture|
|Date:||Jun 1, 2004|
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