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Database sampling: a real-world solution to MMIC yield sensitivity analysis.

In the course of a typical MMIC development and manufacturing program, there are a number of common issues that affect design success as it relates to manufacturability. Even when specific designs are considered successful (in the sense that working MMICs are fabricated), the circuit and wafer yields must be improved to make system insertion affordable. To improve yields and device performance, the necessary steps of process and device enhancements can be completed. However, process development is long term in nature and expensive, and any results must be validated prior to production. There is much to be gained by applying computer-aided engineering (CAE) techniques to enhance circuit and wafer yields, thereby compensating for the influence of the statistical foundry process variation.

Currently, the development cycle for new products based on GaAs MMICs typically involves multiple processing runs through a foundry organization in order to improve the production yield. The development of CAE software incorporating statistical design centering methodologies (based on the technological constraints imposed by a foundry) reduces overall cost and time, thereby providing significant system insertion advantages. Technical limitations exist in the current generation of CAE software for predicting MMIC and wafer yields. To date, no formalized methodology is available in CAD software to provide tight integration between circuit simulations and wafer-level data for yield. The capabilities of the MMICAD[TM] linear simulator have been extended recently to add a new database sampling technique, which can be used to model MMIC yields accurately. This feature is incorporated in version 2 of MMICAD for Windows[TM]. The approach uses a database of equivalent circuit models, developed through data gathering of routine in-process measurements of process control monitor (PCM) devices. This approach differs from traditional statistical modeling, which simply assigns a probability distribution to each model element during statistical analysis. Database sampling uses measurement-based equivalent circuits for each sample run of the Monte Carlo simulation.

By applying the unique combination of active device yield simulation through database sampling and passive element yield simulation through statistical modeling, important yield issues are addressed and their impact is reduced dramatically. The approach is discussed in the context of the manufacture of a 1.6 GHz low noise amplifier (LNA) MMIC. However, the techniques explained are widely applicable for MMIC design at all frequencies.

YIELD-DRIVEN DESIGN

A useful concept to aid sensitivity analysis, circuit variable tolerancing and design centering is the yield factor (YF) associated with the value of each circuit variable. For circuit variable X, YF is defined as the Monte Carlo yield estimate with all circuit variable values except X varying randomly according to the probability density function. A plot of YF(X) as X is varied through its allowed range of values would result in a graphical display of yield vs. parameter values. If the YF(X) plot is constant with respect to the acceptable range of X values, then the circuit yield is not sensitive to X.

An example of a yield analysis that is sensitive to X is shown in Figure 1. Yield, which is displayed on the y-axis, improves as X is increased. An example of a circuit variable that is insensitive to X is shown in Figure 2. This type of analysis identifies circuit variables that are most sensitive to performance, thereby facilitating yield enhancement. These results can be used for design centering.

STATISTICAL MODELING

This approach to MMIC yield prediction relies on the statistical representation for all circuit variables that influence circuit yield. For passive components, this approach typically involves assigning a probability function to the component. For active components (MESFETs or psuedo-morphic high electron mobility transistors), this involves developing a statistical representation for the measured data (for example, HP-EEsof's TRUTH model). A Monte Carlo analysis is performed to develop an approximation to the circuit yield. The advantage of this approach is that a compact representation of parameter variability is obtained. The disadvantage is the difficulty of maintaining this statistical model practically for active devices in normal foundry operations.

Part of the MMICAD simulator circuit file VAR block for a MMIC amplifier is shown in Appendix A. Both resistors and capacitors were given a uniform 10 percent variation. Statistical analysis shows that the passive elements do not contribute significantly to overall circuit yields since relatively low sensitivities are predicted, as shown in Figure 3.

DATABASE SAMPLING

This database sampling approach to MMIC yield prediction involves sampling a measured database of modeled equivalent circuit parameters. In practice, because conventional statistical models have been found to be adequate for passive components, database sampling is applied usually to active device data. The modeled device database can be tailored to a particular MMIC design (bias point or transistor size). A Monte Carlo analysis is performed to develop an approximation to the circuit yield. The advantage of database sampling is that measured data are used in every Monte Carlo run. No statistical model of the device is needed, resulting in highly accurate yield prediction. In effect, the database becomes the statistical model.

The data used in this example are from a completed study using production MESFET foundry data. Using routinely measured DC and microwave characteristics of the PCM MESFET at several bias points, the small-signal equivalent circuit parameters were extracted and this information was stored in a database. The MMIC designer can interrogate this database to extract information on the specific MESFET to be used in the design (bias point, transistor size, lot and run). For the MMIC LNA design being considered, a sample lot of measured data on a 300 [[micro]meter] (4 x 75 [[micro]meter]) MESFET was extracted from several months of manufacturing runs. The small-signal equivalent circuit used for the MESFET database is shown in Figure 4. A portion of the FET database is shown in Appendix B. Nominal bias conditions of [V.sub.ds] = 2 V and [V.sub.gs] = -0.6 to -0.9 V were used for each measurement.

In database sampling variational analysis, a different entry from the database is selected for each case. Since each instance of the FET model is based on actual measured data, there is no concern about whether one parameter, such as [C.sub.gs], is correlated to another (for example, [g.sub.m]). Also, equivalent circuits have the distinct advantage of being scalable to different gate widths more easily than S-parameters. (Scaling is performed using well-known relationships.) In addition, if noise figure performance of the device was modeled by on-wafer measurements, then a FET model with built-in noise parameter support such as MMICAD's FETN can be used to provide statistical simulation of noise figure as well. This concept is illustrated for an L-band MMIC LNA.

The nominal performance of the L-band MMIC amplifier used for yield prediction development is shown in Figure 5. MMICAD then was used to conduct a variational analysis using the nominal values of the passive components, and the lines of the data files were read sequentially. The results are shown in Figure 6. Obviously, the MESFET has a significant influence on LNA performance. Variational analysis does not include the variations due to passive elements, only those of the MESFET. Each row of the database is read sequentially, the LNA response is calculated and the results are displayed. If Monte Carlo analysis was performed, then each entry of the database is selected randomly for each trial. This example also illustrates MMICAD's Smart Re-analysis feature: Only networks to be recalculated depend on the MESFET. Recalculation speed is fast.

The numerical results of the Monte Carlo simulation for yield are shown in Figure 7. As indicated in the dialog box, a total yield of 96.9 percent is predicted for this circuit.

The database sampling approach cannot predict yield dropout due to single-point failures in processing such as handling damage or scratched traces. For similar reasons, yield dropout at DC testing also cannot be estimated. On this particular amplifier, for reasons of production efficiency, DC screening is not performed prior to packaging. At final test, no separation of DC/RF yield dropout is performed. The actual combined DC/RF yield for this device is 92 percent. Therefore, the RF yield of 97 percent predicted by database sampling is quite plausible.

CONCLUSION

The use of measured data in database sampling avoids the accuracy limitations of statistical MESFET modeling for MMIC design centering. MMICAD's design centering technology can reduce cost and improve time to market by eliminating the need to perform expensive design iterations.

APPENDIX A

A PORTION OF THE MMICAD SIMULATOR CIRCUIT FILE VAR BLOCK FOR A MMIC AMPLIFIER

var scalef = 0.9 CSBY = % 140 10% RGAT1 = % 5000 10% RGAT2 = % 8000 10% PSER1 = 180 CFB2 = % 0.6 10% RFBDQ = % 30 10% CINPB = % 50 10% CINP1 = % 0.15 10% PINP1 = 400 CINP2 = % 0.175 10% CSINT = % 0.2 10% RSINT = % 25 10% POUNT1 = 247 ROUT1 = % 13 10% COUT2 = % 0.65 10% CSOUT = % 0.5 10% RSOUT = % 200 10% CDBY = 500 LMLC = 0.6 LPAD1 = 0.2 CPAD1 = 0.15 LPAD2 = 0.25 CPAD2 = 0.2 ! inductor parasitic multipliers for plastic packaging. ! PR1L = 0.95 PR1C1 = 1.75 PR1C2 = 2.25 PR2L = 0.97 PR2C1 = 1.25 PR2C2 = 1.3 PR3C1 = 1.5 TG1 = 450 TD = 3324
APPENDIX B

A PORTION OF THE FET DATABASE

cnt    Rg      Rd      Rs       Lg        Ld       Ls

1     0.67    3.73    2.65    0.0001    0.0032    0.0036

2     0.42    4.05    2.94    0.0071    0.0095    0.0044
3     0.58    4.27    2.99    0.0107    0.0153    0.0042
4     0.78    3.75    2.64    0.0113    0.0118    0.0046
5     0.60    3.75    2.67    0.0097    0.0121    0.0050
6     0.60    3.91    2.67    0.0160    0.0111    0.0038
7     0.77    3.46    2.37    0.0113    0.0173    0.0046
8     0.47    3.79    2.67    0.0059    0.0100    0.0045
9     0.57    4.00    2.77    0.0146    0.0139    0.0040
10    0.38    4.15    2.95    0.0134    0.0154    0.0042
11    0.33    4.32    3.04    0.0135    0.0164    0.0046
12    0.35    4.17    2.94    0.0228    0.0225    0.0047
13    0.37    4.21    3.00    0.0097    0.0130    0.0042
14    0.26    4.17    3.00    0.0233    0.0220    0.0056
15    0.43    4.07    2.80    0.0219    0.0214    0.0045
16    0.32    3.93    2.83    0.0144    0.0157    0.0049
17    0.40    3.80    2.70    0.0227    0.0238    0.0050
18    0.23    3.60    2.65    0.0224    0.0180    0.0039
19    0.31    3.46    2.56    0.0213    0.0175    0.0041
20    0.21    3.82    2.77    0.0213    0.0162    0.0035
21    0.21    3.51    2.65    0.0189    0.0128    0.0034
22    0.23    3.55    2.74    0.0206    0.0178    0.0040
23    0.26    3.52    2.65    0.0156    0.0163    0.0034
24    0.28    3.47    2.69    0.0246    0.0199    0.0044
25    0.29    3.60    2.54    0.0094    0.0118    0.0049
26    0.26    3.58    2.67    0.0089    0.0119    0.0052
27    0.24    3.83    2.70    0.0073    0.0124    0.0047
28    0.31    3.56    2.63    0.0128    0.0092    0.0048
29    0.22    3.51    2.55    0.0101    0.0105    0.0051
30    0.33    3.78    2.79    0.0114    0.0120    0.0049
31    0.24    3.65    2.57    0.0146    0.0120    0.0050
32    0.32    3.48    2.56    0.0092    0.0123    0.0050

Cds        Cgs      Cdg       gm     tau    Ri     Rds

0.0625   0.2547   0.0534   48.083   3.06   2.34   223.36

0.0670   0.2448   0.0506   50.616   2.89   2.16   197.82
0.0662   0.2337   0.0518   45.336   3.01   2.80   227.01
0.0629   0.2421   0.0519   48.891   2.89   2.51   209.64
0.0628   0.2438   0.0521   48.037   2.95   1.93   215.00
0.0585   0.2430   0.0503   44.295   3.11   2.20   236.07
0.0624   0.2411   0.0529   47.872   2.98   2.18   216.16
0.0666   0.2468   0.0537   48.250   2.91   4.21   215.33
0.0615   0.2245   0.0504   44.099   2.90   2.23   228.20
0.0613   0.2325   0.0503   44.675   3.00   2.38   234.46
0.0590   0.2345   0.0498   43.192   3.05   2.46   239.92
0.0577   0.2464   0.0513   41.670   3.25   2.67   267.88
0.0578   0.2233   0.0499   44.627   2.91   2.21   216.12
0.0564   0.2302   0.0492   43.986   3.05   2.35   239.69
0.0564   0.2396   0.0494   44.188   3.03   2.54   237.41
0.0585   0.2288   0.0491   47.780   2.86   2.10   199.88
0.0579   0.2301   0.0483   47.305   2.89   2.22   207.25
0.0679   0.2289   0.0511   51.754   2.84   3.28   180.08
0.0696   0.2400   0.0551   53.685   2.83   3.03   182.04
0.0736   0.2266   0.0546   53.014   2.69   3.01   170.82
0.0701   0.2389   0.0560   54.108   2.77   3.06   176.40
0.0691   0.2304   0.0539   53.857   2.72   3.17   168.43
0.0684   0.2367   0.0545   53.983   2.82   3.28   175.34
0.0709   0.2191   0.0542   50.781   2.64   3.12   161.08
0.0675   0.2250   0.0499   51.676   2.54   4.01   174.07
0.0678   0.2265   0.0511   53.091   2.56   3.81   166.22
0.0715   0.2212   0.0507   49.944   2.55   3.91   184.77
0.0639   0.2204   0.0507   50.230   2.60   4.21   181.12
0.0685   0.2362   0.0533   53.763   2.60   3.52   171.82
0.0644   0.2199   0.0492   51.989   2.56   4.18   171.64
0.0673   0.2260   0.0510   53.711   2.54   3.95   169.03
0.0671   0.2192   0.0514   53.385   2.46   3.61   159.26
COPYRIGHT 1997 Horizon House Publications, Inc.
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 1997 Gale, Cengage Learning. All rights reserved.

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Title Annotation:monolithic microwave integrated circuit
Author:North, Randall; Kennedy, David; Murphy, Mike
Publication:Microwave Journal
Date:Apr 1, 1997
Words:2412
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