CADENCE DEBUTS RF DESIGN FLOW SOLUTION FOR PCB.
Cadence, the world's leading supplier of PCB design solutions, and Agilent's EEsof EDA group, the leader in EDA software for RF design, have developed this solution with an eye toward decreased product development cycle times and increased quality in RF system design.
Using the new solution, throughput is greatly increased for designers wanting to simulate and lay out their block-level RF designs and then complete the remaining inter-block and system-level PCB routing.
According to Dave DeMaria, vice president of marketing for the Cadence PCB Systems Division, "Our RF and wireless customers are facing increased challenges because typical PCBs now contain analog, digital, mixed-signal, and RF circuitry all on the same board. Consequently, they need to integrate their Agilent EEsof RF design data with PCB layout technology so that they can package and lay out their designs in an integrated, front-to-back flow, and then provide the appropriate data to a PCB manufacturer. We believe our cooperative effort with Agilent EEsof EDA provides our customers with an excellent method of achieving that integration."
The interface between Agilent ADS and the Cadence tools is based on an intermediate file format developed by Agilent's EEsof EDA to encompass the special needs of translating RF designs between systems. The interface uses mapping files to accurately translate and map data from one database to the other. The symbol-mapping file allows the Cadence Allegro library components to be mapped to the components used in the Agilent ADS environment.
John Borelli, principal RF design engineer at GHz Circuit Design, Inc. stated, "With this interface, the Agilent ADS components, connectivity, and distributed element artworks are seamlessly imported into the Cadence Concept schematic and the Cadence Allegro layout tools, while still maintaining the overall intra-block, inter-block, and system-level connectivity that was originally intended."
Borelli concluded, "This new interface not only affords us a much faster design cycle time, it removes from the equation much human error, which is inherent when information is transferred manually or the RF design flow is decoupled from the PCB layout."
"With the furious pace of standards evolution and the intense time-to-market pressures faced by the industry as wireless appliances evolve, designers need flows that work seamlessly," said Jacob H. Egbert, general manager of the Agilent EEsof EDA group. "The new Agilent/Cadence design flow fills this need. Our customers will benefit from both companies' abilities to leverage individual expertise and technology strengths in a single solution."
When the Agilent Advanced Design System schematic database is translated with the Cadence Concept HDL schematic tool, a symbol as well as a default footprint is created for packaging the RF block. Once the design is successfully packaged, it can be imported into the Cadence Allegro tool for final layout and manufacture including a complete bill of materials.
New PCB design solutions that contain the Allegro Expert layout tool for UNIX and NT platforms start at $44,000 (U.S.) in North America.
For more information on product pricing and availability, visit http://pcb.cadence.com or call 800-671-9505.
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|Title Annotation:||Company Business and Marketing; Cadence Design Systems and Agilent Technologies|
|Date:||Jan 1, 2000|
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