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Balanced mixers using wideband symmetric offset stack balun in 0.18 [micro]m CMOS.


Mixer is an important component in a heterodyne transceiver system because it converts signals from one frequency to another. A single balanced mixer and a star mixer use two and quad anti-parallel diodes that provide inherent rejection of the input signal at the output due to their balanced amplitude and anti-phase properties. However, these two mixers require balun to feed LO or RF signal, and the balun is the key component in mixer design.

[1] reported a resistive mixer for 60-GHz frequency range. A Lange coupler together with a [lambda]/4 transmission line is used to generate the out-of-phase LO signal. [2] used a microstrip rat-race balun in single balanced diode mixer for a Ka-band satellite transponder. The measured result showed that a conversion loss is less than 9 dB at the IF frequency from 20.0 to 21.6 GHz under 6.5 dBm LO power. [3] demonstrated a V-band high isolation sub-harmonic mixer in standard 0.15-[micro]m pHEMT process. This mixer was composed of a hairpin diplexer, an open stub, and a low-pass filter. The hairpin diplexer was used to improve the isolation between the RF and LO ports. The measured result of conversion loss was lower than 18.3 dB. LO-to-RF and 2LO-to-RF isolations were better than 23.5 and 27.5 dB over a 54-66 GHz bandwidth. The restrictions of these baluns were narrow bandwidth operation, and the chip sizes were large in low frequency design.

[4] developed a broadband mixer using three edge and broadside coupled-lines in pHEMT technology. This diode mixer achieved conversion loss better than 10 dB from 46 to 78 GHz. [5] described a single-balanced mixer using a planar coupled-lines balun in microwave and millimeter wave bands. The best up-conversion loss was 8 dB with an LO-RF isolation better than 30dB. A 16-46 GHz mixer using a broadside-coupled balun fabricated in standard CMOS process achieved a bandwidth from 16 to 46 GHz with a conversion loss ranging from 13 [+ or -] 1.5 dB and a compact chip size of 0.24 [mm.sup.2] [6]. [7] employed an edge-coupled transmission line Marchand balun to feed the LO and RF ports of a ring-type W-band DBM. [8] designed a doubly balanced mixer using two novel configurations of dual baluns in 0.15 [micro]m GaAs pHEMT process. The conversion loss was 6.6 to 10.6 dB within an RF bandwidth from 24 to 40 GHz. The measured LO-to-RF, LO-to-IF and RF-to-IF isolations were higher than 20, 20 and 22 dB from 22 to 40 GHz, respectively. However, the available design parameters of these baluns were limited by their width and space of the edge coupled lines or the width and thickness of the broadside coupled lines which performance was thus restricted.

[9] utilized a lumped frequency diplexer and a low-pass filter for a 16-31 GHz sub-harmonic mixer, whose chip area was 0.57[mm.sup.2], in 0.15 [micro]m GaAs pHEMT process. The lumped frequency diplexer consisted of a low-pass and a high-pass network to reduce the chip size and improved the isolation between the RF and LO ports. [10] presented an L-C lumped element balun to implement an MMIC star mixer, whose conversion loss less than 10 dB was from 1.5 to 5.2 GHz. The lumped baluns were narrow band operation.

[11] presented a broadband, high isolations and a compact chip area doubly balanced ring mixer in 0.15 [micro]m GaAs pHEMT process. The spiral balun with low-pass filter was used to extract IF signals and maintained balun performance simultaneously. The measured conversion loss was lower than 12.4dB. The LO-IF, RF-IF and LO-RF isolations were better than 43.2, 32 and 26.9dB from 11 to 40 GHz, respectively. Several dual balun designs such as double spiral transformer, trifilar transformer and 3-D transformer dual balun [12] were developed for the performance of good amplitude/phase balance, low loss and wide bandwidth. The restrictions of these baluns are the magnetic flux leakage and the parasitic capacitance between the windings, which limited their high frequency response.

To overcome the aforementioned limitations, the authors propose a single balun and a dual balun using symmetrical offset stack couple lines structure [13]. The stacked and meandered line topologies are used in balun design, not only saving the chip area but also having tight coupling characteristic (i.e., wideband performance). Moreover, the offset width of the stack coupled line offers additional design freedom to optimize the balun performance. Then a single balanced mixer and a star mixer utilizing the adopted balun were fabricated in standard 0.18-[micro]m CMOS technology, which achieved low conversion loss and wide bandwidth performance.


This paper begins with an introduction of symmetrical offset stack coupled line balun and dual balun. Using these baluns, two balanced mixers are developed to achieve the performance of wideband, low conversion loss, high isolation and low LO power in 0.18-[micro]m CMOS process.


2.1. Single Balun Design

Figure 1 shows the schematic diagram of a Marchand balun with two identical coupled-line sections (sections a and b). The even/odd mode characteristic admittances of the two sections are denoted as [Y.sub.0ea]/[Y.sub.0oa] and [Y.sub.0eb]/[Y.sub.0ob]. The electrical lengths of section a and b are [[theta].sub.a] and [[theta].sub.b]. The voltage and current of each port in sections a and b are denoted as [], [V.sub.2a], [V.sub.3a], [V.sub.4a], [l.sub.1a], [l.sub.2a], [I.sub.4a] and [V.sub.1b], [V.sub.2b], [V.sub.3b], [V.sub.4b], [l.sub.1b], [l.sub.2b], [I.sub.4b], respectively. When the coupled-line sections are replaced by their admittance matrix, the corresponding Y-parameters matrix of the coupled line structure, in terms of the [Y.sub.0e] and [Y.sub.0o] are given by (1). (let [Y.sub.0e] = [Y.sub.oea] = [Y.sub.0eb], [Y.sub.0o] = [Y.sub.0oa] = [Y.sub.0ob] and [theta] = [[theta].sub.a] = [[theta].sub.b])


where N = -j([Y.sub.0e] + [Y.sub.0o])/2 and M = ([Y.sub.0o] - [Y.sub.0e])/([Y.sub.0o] + [Y.sub.0e]).

The two connected coupled-line networks in Fig. 1 can be viewed as a three-port network. The insertion loss of the balun can be expressed as (2).

[S.sub.21] = -[S.sub.31] = 2[Y.sub.0]C ([Y.sub.0] + B + D)/[DELTA] (2)

A = N(X cot[theta] + 1)/(X + cot[theta]) (2a)

B = N cot[theta](X + cot[theta] - [M.sup.2] cot[theta])/(X + cot[theta]) (2b)

C = NM X csc[theta]/(X + cot[theta]) (2c)

D = -N[M.sup.2] cot[theta]/(X + cot[theta]) (2d)

X = cot[theta] - csc[theta] sec[theta] (2e)

[DELTA] = ([Y.sub.0] + B + D)(([Y.sub.0] + A)([Y.sub.0] + B + D) - 2[C.sup.2]) (2f)

[S.sub.21] and [S.sub.31] are the function of M and [theta] with the same magnitude and 180[degrees] out of phase.

Figure 2(a) shows the 3-D view of the proposed stack balun. The tsmc[TM] 1p6m CMOS technology provides six metallization layers. The balun structure is formed by two metal layers ([M.sub.6]/[M.sub.4]). The width of upper and lower transmission lines is W, and the offset width of two coupler is S. The height between [M.sub.6] and [M.sub.4] is 2 [micro]m and 10 [micro]m between [M.sub.4] and top of substrate. The thickness of substrate is 300 [micro]m. The input signal is fed to the metal layer [M.sub.6], which has thick metal up to 2.3 [micro]m that provides low resistance to obtain a low loss transmission line. The balanced outputs are taken out from the inner metal [M.sub.4] with a 0.56 [micro]m thickness. The balun with two [lambda]g/4 symmetrical coupled-line sections (sections a and b) is shown in Fig. 2(a).




Figure 3 shows the insertion loss frequency response between BW and M of the Marchand balun. When M [less than or equal to] 0.54 or M [greater than or equal to] 0.75, the insertion loss at center frequency ([f.sub.0]) increases, and the lowest insertion loss will occur at both high and low frequencies. We call these cases out-band matching. The [BW.sub.-1db] is defined as [f.sub.H] - [f.sub.L] at IX([f.sub.0]) + 1dB. When 0.54 [less than or equal to] M [less than or equal to] 0.75, the in-band matching cases exhibit the lowest IL at center frequency, and the defined 1-dB bandwidth of IL ([BW.sub.-1dB]) is [f.sub.H] - [f.sub.L]. The flat frequency response occurs at M = 0. 74, as can be observed in Fig. 3.


Figure 4 indicates the extracted [Z.sub.0e] and [Z.sub.0o] for different W and S/W by full-wave electromagnetic simulator, [HFSS.sup.TM]. If W is larger, the [Z.sub.0e] and [Z.sub.0o] become smaller. If S/W is smaller, the [Z.sub.0e] becomes smaller, thus increasing the Zoo impedance. Since the relationship between [Z.sub.0e] ([Z.sub.0o]) and S/W has been founded, we can use M to find the desired transmissions width W and offset ratio (S/W). In balanced mixers applications, W = 20 [micro]m and S/W = 0.7 (i.e., M = 0.74, [Z.sub.0o] = 26 [ohm] and [Z.sub.0e] = 170 [ohm]) are chosen to be close to 50 [ohm] to achieve the maximum bandwidth, low IL and minimum imbalance of the balun.

The proposed symmetrical offset stack balun is fabricated by using 0.18 [micro]m CMOS technology. Fig. 2(b) shows the chip photograph, whose size is 0.07 [mm.sup.2], excluding pads. The S-parameters from 10 to 67 GHz are measured using an Agilent N4421BH67 four-port network analyzer. Fig. 5 shows the measured results of the proposed symmetrical offset stack balun. The measured return loss and insertion loss are better than 10 dB and less than 6.5 dB from 19 to 67 GHz, respectively. The measured amplitude difference is less than [+ or -]1 dB, and the phase difference is less than 180 [+ or -] 4[degrees] from 10 to 67 GHz. Because the field is mostly concentrated between two stack coupled lines, the minimum insertion loss is 4.4 dB at 38 GHz (3dB for an ideal balun). This millimeter-wave balun exhibits low loss, broadband characteristics (more than 110%) and is compact in size.

2.2. Dual Balun Design

Figure 6(a) shows the schematic drawing of the proposed dual balun, formed by two parallel single Marchand baluns. The structure of dual balun is formed with two metal layers ([M.sub.6]/[M.sub.4]). The input signal is fed to the metal [M.sub.6], which has thick metal up to 2.3 that provides low resistance to obtain a low loss couple line. The two pairs of balanced outputs are taken out from the metal [M.sub.4] with a 0.56 [micro]m thickness. The width of the upper and lower coupled lines are 20 and 10 [micro]m, respectively, and the offset width of coupled line is 4 [micro]m. The height between [M.sub.6] and [M.sub.4] is 2 and 10 [micro]m between [M.sub.4] and top of the substrate. The thickness of the substrate is 300 [micro]m.



The design method of the dual balun is described as below. The single balun was designed firstly. The dimension of the coupled lines is selected as W = 10 [micro]m and S/W = 0.4 with an electrical length of [[lambda].sub.g]/4, which has a physical length of 550-[micro]m at the center frequency of 38 GHz. As can be observed in Fig. 4, the odd-mode and even-mode impedances of single balun are 57 [ohm] and 155 [ohm], respectively. The impedance of the single balun can be calculated as 94 [ohm]. By paralleling two single baluns, the input impedance [Z.sub.0] of the dual balun is 47 [ohm], which provides a good match at RF/LO ports.

Figure 6(b) shows the chip photo of dual balun whose size is 0.07[mm.sup.2]. The measured results are shown in Fig. 7. The insertion loss from 22 to 58 GHz is lower than 10 dB, and the return loss is better than 10 dB from 30 to 67 GHz. A [+ or -]1-dB amplitude difference and a 180 [+ or -] 5[degrees] phase imbalance are obtained from 11 to 50 GHz.

2.3. Single Balanced and Star Mixers Design

2.3.1. Single Balanced Mixer

Figure 8(a) shows the schematic of the single balanced mixer. This mixer consists of a single balun, two GD-connected diodes, and a low pass filter. The impedance of the diode ([Z.sub.d] = 54 [ohm]) can be calculated according to [Z.sub.d] = [(2[Z.sub.0o]).sup.2]/[Z.sub.s], where [Z.sub.S](50 [ohm]) is the source impedance, and [Z.sub.0o] (26 [ohm]) is the balun odd-mode impedance. Four fingers with total width 44-[micro]m NMOS transistors are selected as the mixing device. The impedance level is 54 [ohm] from 10 to 65 GHz, under an 11-dBm LO power pumped through the balun. The optimized odd impedance of diode is selected to match for the adopted balun directly to eliminate the matching circuits between the balun and the diodes, and thus results in wide bandwidth and compact size. The LO signal leaking through the diode capacitance is canceled at the RF/IF ports due to their anti-phase LO relationship. At RF port, a small series capacitor is employed as a high-pass filter to provide IF-to-RF isolation. At IF port, a low-pass filter consisting of an inductor and a shunt capacitor is used to increase LO-to-IF and RF-to-IF isolations. The current flow of the mixer is shown in Fig. 8(a), and the resulting IF output current is represented in [i.sub.IF] = ([(-1).sup.m] - 1)[i.sub.d2], where m is the order of RF harmonics. For the mixer operation, while m = 1, and [i.sub.IF] is two times of [i.sub.d2].


2.3.2. Star Mixer

Figure 8(b) shows that the schematic of star mixer consists of a pair of dual baluns for LO and RF signals and a quad diode for mixer core. Using the ADS[TM] MOMENTUM EM simulator, the calculated [Z.sub.0o] of dual balun is 25 [ohm]. The impedance of star quad diode ([Z.sub.d] = 50 [ohm]) can be calculated according to [Z.sub.d] = [(2[Z.sub.0o]).sup.2]/[Z.sub.s], where [Z.sub.S] (50 [ohm]) is the source impedance, and [Z.sub.d] is the impedance of an individual diode. In our design, the mixer diode was implemented using the GD-connected N-MOSFET. The finger and width/length of each diode was selected as 16 and 64/0.18 [micro]m. The impedance level is 50 [ohm] from 20 to 60 GHz under an 11-dBm LO power pumped through the dual balun. The IF signal is directly taken out from center of the diode quad. Fig. 8(b) shows the circuit schematic diagram and current flow of the star diode mixer, and the resulting IF output current represents in [i.sub.IF] = ([(-1).sup.m] -1)([(-1).sup.n] -1)[i.sub.d1], where m and n are the order of LO and RF harmonics, respectively. For the star mixer operation, while m and n are even the [i.sub.IF] equals zero, whereas m and n are odd the [i.sub.IF] is four times of [i.sub.d1]. Therefore, it obtains better suppression of even-order spurious signals at the IF output.


Figure 9(a) shows the chip photograph of the single balanced mixer, whose size is 0.24 [mm.sup.2]. Fig. 10(a) shows the measured conversion loss of IF and RF bandwidth at -15-dBm RF power and an 11-dBm LO power. The measured IF conversion loss is less than 15 dB from 0.1 to 3.1 GHz. The measured conversion loss is lower than 15 dB from 14 to 52 GHz which is correspondent with an RF bandwidth of 115%. The minimum conversion loss is 10.5 dB at the RF frequency of 20 GHz. The measured isolations are shown in Fig. 10(b). The LO-RF, LO-IF and RF-IF isolations exceed 24 dB, 41 dB and 34 dB, respectively, with the LO and the RF frequencies varied from 10 to 65 GHz, respectively.

Table 1 summarizes the performance of the recently published millimeter-wave single balanced mixers. The proposed mixer achieves a wide bandwidth of over 115%, which is the widest documented bandwidth relative to the cited MMIC designs. Work [2] has the lowest conversion loss and LO power. However, it operates at low frequency band, and the chip size is very large. Compared with the p-HEMT mixer designs, this work obtains better wide bandwidth, and compact size. Compared with the same CMOS mixer designs [5], our proposed mixer has better performance of bandwidth.




Figure 9(b) shows the chip photograph of the star mixer, whose size is 0.6 x 0.4 [mm.sup.2]. Fig. 11(a) presents the measured conversion loss of the star mixer. This mixer with the symmetric offset dual balun has a bandwidth of 100% and a conversion loss of less than 15 dB from 20 to 60 GHz. The minimum conversion loss is 11 dB under 11-dBm LO power at 30 GHz and a fixed IF frequency of 0.2 GHz. The characteristic of the IF bandwidth at the 11-dBm LO power and -15-dBm RF power is less than 15 dB at IF frequencies from 0.1 to 1.5 GHz as shown in Fig. 11(a). The measured port-to-port isolations of the mixer are shown in Fig. 11(b). The measured LO to RF and LO to IF isolations are better than 31 dB and 44 dB at RF frequencies from 20 to 65 GHz. The RF-IF isolation is better than 35 dB, and the single balanced resistive mixer provides good port-to-port isolations.

Table 2 compares the proposed star mixer with the cited millimeter-wave double balanced mixers. The mixers in [9,10] achieve conversion losses of less than 12.4 dB and bandwidths of over 110%. However, they need high LO power and occupy large die size. Compared with the same CMOS process, such as [5,11], our proposed star mixer has better bandwidth performance with comparable conversion loss and port-to-port isolations.


A single balanced mixer and a star diode mixer utilizing the inherent 3-D multilayer structure wideband symmetrical offset stack baluns in CMOS process have been proposed. By controlling the even/odd mode impedances, the single balun and dual balun have been demonstrated in a minimum insertion loss of 4.4 dB at 35 GHz and 7.4 dB at 38 GHz, respectively. The measured amplitude/phase imbalances of single and dual baluns are 1-dB/4[degrees] and 1-dB/5[degrees], respectively. The proposed single balanced mixer achieves a bandwidth of 115%, a conversion loss lower than 15 dB, a port to port isolation higher than 24dB, and an IF bandwidth of 3.1 GHz, respectively. The measured conversion loss, port to port isolations and IF bandwidth of star mixer are lower than 15 dB, higher than 31 dB, and 1.5 GHz, respectively.


This work was supported National Science Council (NSC) of the Republic of China under Contract No. NSC 99-2221-E-008-100-MY3. The authors would like to thank constant support from the Chip Implementation Center (CIC) of National Applied Research Laboratories.

Received 30 May 2011, Accepted 11 July 2011, Scheduled 28 July 2011


[1.] Varone, M., M. Karkkainen, J. Riska, P. Kangaslahti, and A.-I. Halonen, "Resistive HEMT mixers for 60-GHz broad-band telecommunication," IEEE Trans. Microw. Theory Tech., Vol. 53, No. 4, 1322-1330, Apr. 2005.

[2.] Guo, J., Z. Xu, C. Qian, and W. Dou, "Design of a microstrip balanced mixer for satellite communication," Progress In Electromagnetics Research, Vol. 115, 289-301, 2011.

[3.] Lin, C.-M., J.-T. Chang, C.-C. Su, S. H. Hung, and Y. H. Wang, "A 16-31 GHz miniature quadruple subharmonic monolithic mixer with lumped diplexer," Progress In Electromagnetics Research Letters, Vol. 11, 21-30, 2009.

[4.] Wu, P.-S., C.-S. Lin, T.-W. Huang, and H. Wang, "A millimeter-wave ultra-compact broadband diode mixer using modified Marchand balun," Gallium Arsenide and Other Semiconduct. Applicat. Symp., 349-352, Oct. 2005.

[5.] Lin, C.-H., H.-Z. Liu, C.-K. Chu, H.-K. Huang, C.-C. Liu, and C.-H. Chang, "A Ku/K-band PHEMT diode single-balanced mixer," Solid-state Integrated Circuit Technol. Conf., 884-886, Oct. 2006.

[6.] Chiou, H.-K. and T.-Y. Yang, "Low-loss and broadband asymmetric broadside-coupled balun for mixer design in 0.18-[micro]m CMOS technology," IEEE Trans. Microw. Theory Tech., Vol. 56, No. 4, 835-848, Jun. 2008.

[7.] Hung, S.-H., W.-C. Chien, C.-M. Lin, Y. A. Lai, and Y.-H. Wang, "V-band high isolation subharmonic monolithic mixer with hairpin diplexer," Progress In Electromagnetics Research Letters, Vol. 16, 161-169, 2010.

[8.] Lin, C.-M., Y.-C. Lee, S.-H. Hung, and Y. H. Wang, "A 28-40 GHz doubly balanced monolithic passive mixer with a compact IF extraction," Progress In Electromagnetics Research Letters, Vol. 9, 59-66, 2009.

[9.] Kim, J., K.-T. Kornegay, J. Alvarado, C.-H. Lee, and J. Laskar, "W-band double-balanced down-conversion mixer with Marchand baluns in silicon-germanium technology," Electron. Lett., Vol. 45, No. 16, 841-843, 2009.

[10.] Chiou, H.-K., Y.-R. Juang, and H.-H. Lin, "Miniature MMIC star double balanced mixer using lumped dual balun," Electron. Lett., Vol. 33, No. 6, 503-505, Apr. 1997.

[11.] Lee, Y.-C., C.-M. Lin, S. H. Hung, C.-C. Su, and Y.-H. Wang, "A broadband doubly balanced monolithic ring mixer with a compact intermediate frequency (IF) extraction," Progress In Electromagnetics Research Letters, Vol. 20, 175-184, 2009.

[12.] Kuo, C.-C., C.-K. Kuo, C.-J. Kuo, S. A. Mass, and H. Wang, "Novel miniature and broadband millimeter-wave monolithic star mixer," IEEE Trans. Microw. Theory Tech., Vol. 56, No. 4, 793-802, Jun. 2008.

[13.] Chiou, H.-K. and J.-Y. Lin, "Symmetric offset stack balun in standard 0.13 um CMOS technology for three broadband and low-loss balanced passive mixer designs," IEEE Trans. Microw. Theory Tech., Vol. 59, No. 6, 1529-1538, Jun. 2011.

H.-K. Chiou * and J.-Y. Lin

Department of Electrical Engineering, National Central University No. 300, Jhongda Road, Jhongli City, Taoyuan County 32001, Taiwan, R.O.C.

* Corresponding author: Hwann-Kaeo Chiou (
Table 1. Performance benchmark of
the recently published single
balanced mixers.

References             [1]            [2]           [3]

Process           0.25 [micro]m     Package    0.15 [micro]m
                      pHEMT                        pHEMT
RF Freq. (GHz)        57-67        29.8-31.4       46-78
  B.W. (%)            16.1%          5.2%          51.6%
Conv. Loss (dB)        11.5           8-9          7-10
LO Power (dBm)          8             6.5          12.5
Isolation (dB)
LO-RF                   34            N/A           20
LO-IF                  N/A            N/A           N/A
Chip Area               3            1350           0.3

References             [4]             [5]        This Work

Process           0.25 [micro]m   0.18 [micro]m    0.18 um
                      pHEMT           CMOS          CMOS
RF Freq. (GHz)        15-22          12-22.5        14-52
  B.W. (%)            37.8%            61%          115%
Conv. Loss (dB)      8.3-12           < 10         10.5-15
LO Power (dBm)         15              11            11
Isolation (dB)
LO-RF                  30              25            24
LO-IF                  40              37            41
Chip Area             32.5            0.24          0.24

Table 2. Performance bench mark of
the double balanced mixer.

References             [5]             [9]         [10]

Process           0.18 [micro]m   0.15 [micro]m    GaAs
                      CMOS            pHEMT
RF Freq. (GHz)        25-56           11-40       1.5-5.2
  B.W. (%)            76.5%           114%         110%
Conv. Loss (dB)        15           7.2-12.4      8.5-10
LO Power (dBm)         11              13           17
Isolation (dB)
  LO-RF                35             26.9          15
  LO-IF                50             43.2          15
  RF-IF                30              32           NA
Chip Area             0.34            0.72         0.64

References            [11]            [12]          This Work

Process           0.13 [micro]m   0.15 [micro]m   0.18 [micro]m
                      CMOS            pHEMT           CMOS
RF Freq. (GHz)        25-45           28-40           20-60
  B.W. (%)            57.1%           35.3%           100%
Conv. Loss (dB)       8-14          6.6-10.6          11-15
LO Power (dBm)          6              13              11
Isolation (dB)
  LO-RF                30              20              31
  LO-IF                40              31              44
  RF-IF                30              23              35
Chip Area             0.34            1.53            0.24
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Author:Chiou, H.-K.; Lin, J.-Y.
Publication:Progress In Electromagnetics Research C
Article Type:Report
Geographic Code:9TAIW
Date:Jun 1, 2011
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