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Altera Corporation (Nasdaq:ALTR), a supplier of programmable logic devices (PLDs), has announced the availability of its new Mercury device family, the world's first programmable ASSPs. Altera Mercury devices integrate the functionality of a high-speed transceiver ASSP with a high performance PLD core, built from the ground up to support high bandwidth and rapid data transfer rates. The Clock Data Recovery (CDR) transceivers within the Mercury devices eliminate frequency barriers faced by source-synchronous systems by offering data rates of up to 1.25 Gbps and a total CDR bandwidth of up to 45 Gbps. This advanced CDR capability, combined with a high performance core and distributed multiplier capability, offers system designers an effective solution for key communications applications including serial backplane, chip-to-chip, and line side applications.

"As the requirement for I/O bandwidth increases, CDR becomes essential as an enabling technology for system designers," said Tim Colleran, Altera vice president of product marketing. "Altera's Mercury family addresses this need by combining the advanced CDR transceiver technology of an ASSP with world-class programmable logic."

Unlike typical ASSP solutions, which provide 1-4 channels of CDR support and rapidly consume board space, Altera's Mercury devices provide either 8 or 18 channels of CDR capability on a single device. In addition, the Mercury device family is manufactured on a reliable CMOS production process rather than a costly high power consumption process such as Gallium Arsenide or Silicon Germanium. The integration of CDR transceivers with highly optimized programmable logic allows the designer to combine ASSP functionality with the custom proprietary logic that represents the true value proposition of a communications system.

The Mercury devices offer support for a wide variety of common protocols, including SONET, Gigabit Ethernet, RapidIO, POS-PHY Level 4, IEEE 1394, and Fibre Channel. This support is enabled with the LVDS, LVPECL, and PCML physical standards. Altera was the first PLD vendor with integrated support for differential I/O standards with True-LVDS support in 1999. These differential standards allow data to be transmitted using fewer pins at higher speeds thus providing higher performance, lower power consumption, increased noise immunity, and lower board space requirements. High-speed serial backplanes in particular illustrate the increasing demand for differential I/O standards and CDR. These systems require high-speed data rate transmission between many independent line cards, each running off an independent clock. Altera's Mercury device family enables this interface by breaking down performance barriers, and by providing the necessary programmable logic to complete system requirements.

Altera's Mercury devices are supported by Quartus II development software, Altera's fourth-generation development environment. Altera's Quartus II software was developed to support system-level designs and features good-as-native links to industry-leading, third party tools from Synplicity, Synopsys, Mentor Graphics, and other leading EDA vendors. Altera's Quartus II software meets the challenges of designing for multi-million gate devices and enables SOPC design methodologies. It supports major operating systems, including Windows NT, Windows 98, Windows 2000, Sun Solaris, and HP-UX.
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Publication:EDP Weekly's IT Monitor
Article Type:Product Announcement
Geographic Code:1USA
Date:Feb 26, 2001

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