A high efficiency 1.8 W, 6 to 18 GHz HBT MMIC power amplifier.
Several lots of wafers have been processed with the new MMIC design. This MMIC is fully matched on chip and is DC/RF tested at the wafer level. The amplifiers are tested for small-signal gain and pulsed-power performance over the band, and the data are transferred to a database for storage and analysis. This paper describes the performance distributions observed and identifies process improvements for further reducing the spread in MMIC performance.
The 1.8 W, 6 to 18 GHz, 2.1 x 4.85 mm, two-stage, wideband MMIC, shown in Figure 1, was developed for a phased-array radar application that required fully tested, matched MMICs for the power amplifier. Therefore, the output matching network was placed on chip since off-chip matched amplifiers are difficult to test.
The output matching network, a three-section filter, is designed to provide the optimum load impedance to the eight 0.25 W unit cells that compose the output transistor. Measured load pull data on the 0.25 W cells were used to determine the desired load across the band. The layout was optimized using the Sonnet electromagnetic simulator to account for layout parasitics and to match the impedance presented to each unit cell. Losses in the output network were minimized using wide microstrip transmission lines and by minimizing use of metal-insulator-metal (MIM) capacitors, which tend to have low Q. The simulated loss in the output matching network is 0.4 dB, which lowers the PAE only slightly to 32 percent from 35.4 percent at 18 GHz. The input stage consists of four 0.25 W cells identical in design to the devices used in the output stage. The design of the input matching network is based on measured S-parameters of the unit cells.
The 0.25 W common-emitter HBT unit cell used in both stages of the MMIC is shown in Figure 2. This unit has four 2 x 20 [[micro]meter] emitter fingers arranged in two rows and two columns. A central base feed connects the base terminals of the four subcells while the collectors are air bridged. The emitters are grounded through 40 [[micro]meter] via holes. A 5 [ohms], thin-film, ballast resistor is placed in series with each emitter finger to minimize the possibility of device burnout due to current hogging.
The unit cell has a DC current gain [Beta] of 15 to 25 at the operating current density of 55 kA/[cm.sup.2], B[V.sub.cb0] of 21 V, and [f.sub.T] and [f.sub.max] at [V.sub.ce] = 7 V of 25 and 55 GHz, respectively. This unit cell can provide 0.25 W up to 18 GHz. At this power level, gain and PAE are 7.5 dB and 45 percent, respectively, at 18 GHz. At 10 GHz, the gain is 12 dB with a PAE of 60 percent. I-V characteristics of the unit cell are shown in Figure 3. The onset of current collapse,[4,5] where one of the emitter fingers begins to carry the total device current and [Beta] drops precipitously, is indicated by the sharp kink in the I-V curves. For this device, current collapse occurs when internal power dissipation exceeds 290 mW. The thermal impedance of this device, measured using a technique that was described previously, is 400 [degrees] C/W at a base plate temperature of 40 [degrees] C.
HBT MMIC FABRICATION
The HBT amplifier MMICs were fabricated on three-inch wafers with metal-organic chemical vapor deposition-grown epitaxial layers. The active-layer profile is listed in Table 1, and a schematic cross section of the device identifying the layers is shown in Figure 4. The base layer is 1000 [Angstrom] thick, is doped with carbon to 4 x [10.sup.19] [cm.sup.-3] and has a sheet resistance of 250 [ohms]/sq. Contacts to the emitter and the subcollector are formed using AuGe/Ni, and Ti/Pt/Au is used to contact the heavily doped base layer. The base contacts are self-aligned to the emitter and are formed as described previously. In addition to HBTs of various sizes, the MMIC process provides a 2.3 [[micro]meter] thick local interconnect metallization and a 3 [[micro]meter] thick global air-bridge metallization, as well as 10 [ohms]/sq. thin-film resistors, 365 pF/[mm.sup.2] MIM capacitors and via holes through the 100 [[micro]meter] thick substrate.
The most significant factor limiting the DC yield of these MMICs was a filamentary short between the base and emitter contacts. This problem was finally overcome by replacing the all-wet-etch process for etching down to the base layer with a dry etch for the GaAs layer and a wet etch for the AlGaAs layer. This solution increased the median yield of 0.25 W cells from 87 to 98 percent and the HBT yield in the MMIC from 19 to 79 percent. The dry/wet-etch process provides a uniform undercut of the emitter metallization irrespective of crystalline orientation, which is essential for high base-emitter yield.
[TABULAR DATA OMITTED]
MMIC RF PERFORMANCE
The output power and PAE at an input power of 22.5 dBm, and the small-signal gain are shown in Figure 5 across the 6 to 18 GHz band. These measurements were taken with [V.sub.ce] = 7 V on a typical MMIC mounted in a 50 [ohms] microstrip test lecture. The MMIC performance is best in the upper half of the 6 to 18 GHz band. The output power is [greater than or equal to] 2 W, with PAE greater than 30 percent over these frequencies. Data from over 250 MMICs from 16 wafers are stored in the database. These measurements were taken on wafer and differ slightly from the fixtured measurements. This difference is because the bond wires at the input and the output in the 50 [ohms] test lecture alter the impedance presented to the MMIC. Typically, the gain and power at the band edges are lower by 1 to 1.5 dB when the MMIC is tested on wafer.
The variation in small-signal amplifier gain across the band is shown in Figure 6. The average gain and its standard deviation [Sigma] at each frequency are also shown; [Sigma] is approximately 1 dB. Similar data on the output power (at an input power of 23 dBm) at 6, 10, 14 and 18 GHz are shown in Figure 7. On-wafer power measurements were restricted to these four frequencies to minimize test time while providing data representative of the performance across the band. Figure 8 shows data on the associated PAE at the four test frequencies. The standard deviations in output power and PAE are less than 1.3 dB and less than six percent, respectively.
Efforts to correlate process variations to MMIC performance variations have experienced some success. In the process employed for these MMICs, variations in emitter contact resistance and emitter width were found to be significant, as shown in Figure 9. Both of these parameters affect the total emitter resistance, which is strongly correlated to device gain at 19, GHz. Changes in emitter width also affect the device's emitter current density, which alters its large-signal performance. The reproducibility of the active-layer profile and process parameters, such as contact resistances, device-critical dimensions, MIM capacitor values and chip thickness, are important in controlling MMIC RF performance.
A high efficiency two-stage AlGaAs/GaAs HBT MMIC power amplifier covering 6 to 18 GHz has been designed and fabricated. This MMIC provides 1.8 [+ or -]0.6 W over the band, with PAE varying from approximately 20 percent at 10 GHz to greater than 50 percent at 14 GHz. The associated power gain is approximately 10 dB. This MMIC is fully matched and is tested on wafer after completion of backside processing. Data on small-signal and pulsed-power performance are stored in a database. This paper has provided a summary of MMIC design and fabrication methods, as well as performance data on over 250 devices from 16 wafers. Key process improvements to further tighten amplifier performance distributions are discussed.
This work was performed for the Microwave and mm-wave IC (MIMIC) Phase 2 program through a subcontract with TRW under prime contract from the US Army Research Laboratories in Ft. Monmouth, NJ. The MIMIC Phase 2 program is sponsored by the Department of Defense, Advanced Research Projects Agency. The Sonnet electromagnetic simulator is a product of Sonnet Software Inc., Liverpool, NY.
1. Mike Salib, Fazal Ali, Aditya Gupta, Burhan Bayraktaroglu and Dale Dawson, "A 5 to 10 GHz, 1 W HBT Amplifier with 58 Percent Peak Power-added Efficiency," IEEE Microwave and Guided Wave Letters, Vol. 4, No. 10, October 1994, pp. 320-322.
2. Fazal Ali, Aditya Gupta, Mike Salib, Bradley Veasel and Dale Dawson, "A 2 W, 8 to 14 GHz HBT Power MMIC with 20 dB Gain and Greater Than 40 Percent Power-added Efficiency," IEEE Transactions Microwave Theory Techniques, Vol. 42, No. 12, December 1994, pp. 2635-2641.
3. Mike Salib, Aditya Gupta, Fazal Ali and Dale Dawson, "A 1.8 W, 6 to 18 GHz HBT MMIC Power Amplifier with 10 dB Gain and 37 Percent Peak Power-added Efficiency," IEEE Microwave and Guided Wave Letters, Vol. 3, No. 9, September 1993, pp. 325-326.
4. W. Liu, S. Nelson, D. Hill and A. Khatibzadeh, "Current Gain Collapse in Microwave Multifinger Heterojunction Bipolar Transistors Operated at Very High Power Density," IEEE Transactions on Electronic Devices, Vol. 40, 1993, pp. 1917-1927.
5. L. Liou, B. Bayraktaroglu and C. Huang, "Thermal Stability Analysis of Multifinger Microwave AlGaAs-GaAs Heterojunction Bipolar Transistor," IEEE International Microwave Symposium Digest, June 1993, pp. 281-284.
6. Dale Dawson, Aditya Gupta and Mike Salib, "CW Measurement of HBT Thermal Resistance," IEEE Transactions on Electronic Devices, Vol. 39, October 1992, pp. 2235-2239.
7. Aditya Gupta, "Microwave Power Applications of GaAs Heterojunction Bipolar Transistors," Proceedings IEEE Princeton Section Sarnoff Symposium, March 1993.
|Printer friendly Cite/link Email Feedback|
|Title Annotation:||heterojunction bipolar transistor; monolithic microwave integrated circuits|
|Author:||Gupta, Aditya; Salib, Mike; Ezis, Andy|
|Date:||Aug 1, 1996|
|Previous Article:||Understanding Smart Sensors.|
|Next Article:||The 1996 Wireless Workshop.|