# A NON-ISOLATED INTERLEAVED HIGH STEP-UP SWITCHED-CAPACITOR CONVERTER FOR DISTRIBUTED GENERATION SYSTEM.

Byline: Hadi Moradi Behrooz Vahidi Jafar Mili Monfared and Sina
Salehi

ABSTRACT: A non-isolated interleaved boost converter with coupled inductors and switched-capacitor circuits is presented in this paper which can be employed for renewable energy conversion systems including the photovoltaic (PV) and the fuel cell (FC). Whereas the voltage generated by these sources is low a converter with high voltage conversion ratio is the main requirement for connection to a relatively high dc-bus voltage. To obviate this necessity a switched-capacitor circuit is magnetically connected to interleaved boost converter which effectively increases the voltage growth and decreases the voltage stress in the semiconductor components and thereby the conduction losses are diminished. In fact the proposed converter operates as a flyback converter in some times and forward converter in other times. To restrain the leakage energy of the coupled inductors and confine the voltage spikes on the main switches the active clamp technique is employed.

Furthermore the zero voltage switching (ZVS) operation is guaranteed even in the light load which leads to degradation of the switching losses. Also the leakage inductance of the coupled inductors is handled to realize zero-current-switching (ZCS) performance of the diodes. At last a 1-kW prototype is implemented to confirm the theoretical analysis and performance of the proposed topology.

Keywords: Active clamp circuit; coupled inductor; high step-up converter; interleaved boost converter; switched-capacitor LIST OF SYMBOLS

C capacitor

L inductor I current R resistor

t time

V voltage

ZCS zero current switching

ZVS zero voltage switching

1. INTRODUCTION

To solve energy problems as rapidly rising fossil fuels costs and environmental deterioration employing renewable energy sources including photovoltaic (PV) fuel cell (FC) wave as a major form of clean technology could be the benefit solution [12]. Between these sources system based PV and FC power are appropriate sources for the future energy challenge because of their significant merits as high efficiency low environmental impact and more reliable generated power [34]. But relative low output voltage is the main defect of these energy sources therefore existence of a converter with high voltage gain is essential to regulate and lift their output voltage to a higher level for grid connected application [5 6]. It is important therefore to discover and evaluate new DC/DC converters with fair low input current ripple high efficiency low voltage stress over the power devices and soft-switching achievement [7-9].

The first offer for this converter is the conventional interleaved parallel boost converter. The main advantage of designing a converter by means of interleaved parallel connected converter is that ripples cancellation in both the input and output waveforms. The dynamic response modification and the magnetic component volume reduction are other features of the interleaving structure [10]. But this topology still has some limitations that prevent using it in the high step up applications. To obtain greater voltage conversion ratio the interleaved boost converter needs to work in very high duty cycle which is inefficient and may cause some impairments [11]. The boost converters with coupled inductor are the preeminent solution that ensures high voltage gain while the switch works with low duty ratio [12-14]. Beside the duty cycle another design factor is provided to enlarge the voltage gain in proportion to the winding turns ratio. Thus the converter can easily attain high voltage gain;

meanwhile the switches tolerate less voltage stress. But the leakage energy is a destroyer factor in these topologies and causes high-voltage ripples across the switch during its turned-off period. To protect the switch devices and reuse the leakage energy either a MOSFET with high breakdown voltage and high drain-source resistance RDS(on) or the passive lossless clamp circuit usually adopted [15]. In fact the passive lossless clamp circuit makes this converter one of indispensable choices in some high voltage applications. But high voltage stress of the diode the electromagnetic interference (EMI) and high conduction losses are this topology major weakness. To overcome these drawbacks an additional resistorcapacitor diode (RCD) snubber has to be used [16]. The active-clamp circuit is another technique to keep down the switch voltage spike in turn-off duration which enables soft-switching procedure and reuses the leakage energy [17].

The switching losses are the main factor in the efficiency reduction [1819]. So the soft switching should be satisfied in the converters. Some topologies are introduced that attain higher voltage gain by employing the secondary side winding in series with the circuit output stage. In this converter a suitable turns ratio can be selected to earn a high voltage changeover ratio and low voltage stress over the switches [20]. Several topologies have been derived based on the concept of using the coupled inductors in combination with the voltage doubler rectifier circuit [21 22]. Merging the coupled inductor with the voltage multiplier cell is a good solution to wield the leakage energy degrade the power devices voltage stress and attain high voltage gain [23 24]. However the input current with large ripples would hamper their using in the high power cases. One of the best methods to improve

the input current ripple issue is the input-parallel coupled inductor based structure that is introduced in [25]. In order to obtain high voltage gain the secondary and tertiary windings are inserted in series to the output stage of the converter and operate as dc voltage sources that make this converter applicable for high voltage applications with large input current. These multiple windings make the converter bulky and complicate the design procedure and manufacturing.

In this paper a non-isolated ZVS high step-up dc/dc converter is investigated by employing a switched-capacitor circuit into the conventional interleaved coupled inductor based converter. To share the large input current attenuate the input current ripple and degrade the conduction losses interleaved coupled inductor configuration with asymmetrical pulse with modulation (PWM) control scheme is employed in the input side. Low input current ripple increases the fuel cell stack and the PV module lifetime. To prosper voltage gain ratio the coupled inductor secondary side winding are connected in series and operate as voltage source in proportion to turn ratio. Also a voltage rectifier cell composed of switched capacitor cells is embedded in the output side to achieve this target in the relative low value duty cycle. As a result the voltage stress in the power switches are reduced in proportionate to the turns ratio of the coupled inductors

and the MOSFETs with lower drain- source resistance can be employed which improves the converter efficiency.

The main merits of the proposed converter are listed as follows: 1) high voltage conversion ratio can be realized by merging two circuits that is the coupled inductor topology with the switched-capacitor circuit; 2) the coupled inductors transfer the input energy to the load or save in the switched- capacitors during whole switching period; 3) the leakage inductance controls the output diode and the switched- capacitor diodes current and this is why the reverse- recovery issue is mitigated and the efficiency is increased; 4) Soft switched performance is covered over the whole switching duration and can be fulfilled for both the main and the clamp switches.

After this reviewing section the operational principle of the proposed converter is presented in section 2 along with its theoretical waveforms. The design parameters are given in section 3. The converter design procedure is illustrated in Section 4 and the experimental waveforms are given in Section 5. The conclusion is given in the final section

2. THE PROPOSED CONVERTER AND ITS OPERATIONAL PRINCIPLE

The first stage of presented converter is conventional interleaved coupled inductor based converter with active clamp circuit while the second stage is a voltage rectifier stage composed of switched capacitor cells to provide high voltage conversion ratio. The first stage provides the continuous input current with low ripple and reuses the leakage energies of the coupled inductor. As demonstrated in Fig.1 the coupled inductor model consists of an ideal transformer the magnetizing inductance and the leakage inductance.

The parameter N is defined as turn ratio of n2/n1. The magnetic coupling method are depicted by " and " as shown in Fig. 1. The magnetizing inductors are applied paralleled in the input stage as the filter inductors and the secondary windings are inserted in series to the output stage of the circuit and operate as a voltage source to attain high voltage conversion ratio. The left dashed block consists of primary windings of the coupled inductors the main switches S1 and S2 the clamp switches Sc1 and Sc2 and the clamp capacitor Cc. The right dashed block consists of the secondary windings of the coupled inductors the series capacitor Cm1 and Cm2 and two diodes Dr1 and Dr2. Also Do is the output diode Vin is the input voltage and Vout is the output voltages and R is the load resistance. The theoretical waveforms of the proposed converter are illustrated in Fig.

2. Sixteen main modes exist in the operation of the investigated converter in the each switching period Ts. Due to symmetrical operation of the interleaved stage eight modes are studied preciously. The current-flow path corresponding to eight modes is shown.

2.1. Mode 1 [t0 t1]

Two switches S1 and S2 are turned-on and the voltage rectifier stage diodes Dr1 and Dr2 and the output diode Do are turned off in this time duration. The input current flows through the magnetizing inductors Lm1 and Lm2 and the leakage inductances Lk1 and Lk2 linearly. The magnetizing inductances Lm1 and Lm2 are charged by input voltage Vin.Equation

2.2. Mode 2 [t1-t2]

At t1 the main switch S1 is ceased to conduct. So the magnetizing inductance current iLm1 begins to charge the parasitic capacitor Cs1. As the parasitic capacitor Cs1 is very small all currents flow through it and drain-source voltage of the switch S1 is rising with constant rate contemporary. The amount of transferred charge depends on the capacitance of parasitic capacitor and thereby the parasitic capacitor controls the voltage variation slope. Therefore zero-voltage-switching operation of the main switch S1 in the turns-off state is realized.Equation

2.3. Mode 3 [t2-t3]

At t2 the drain-source voltage of the clamp switch Sc1 is fallen to zero and its body diode Ds2 starts to conduct. At this moment the current is flowing through the switches in the opposite direction and the voltage of the clamp switch Sc1 keeps as zero while its gate signal is not applied. This implies the zero-voltage turn-on of the clamp switch Sc1 is attained. The difference between the input voltage Vin and the clamp capacitor voltage VCc makes the magnetizing inductances Lm1 to discharge.

2.4. Mode 4 [t3-t4]

At t3 the voltage across the voltage rectifier stage diodes Dr1 and Dr2 fall to zero and then the coupled inductors transmit the input energy to series capacitor Cm1 and Cm2. A resonant circuit is formed composed of the series capacitors Cm1 Cm2 the clamp capacitor Cc and the leakage inductance of the coupled inductor Lk1. Because of considerably large resonant period the current iLk1 is going up about linearly in this mode. The current through S2 is summation of the magnetizing inductor current and reflected the secondary winding current. The upper coupled inductor operation is similar to forward converter and the lower one performance is similar to flyback converter.

2.5. Mode 5 [t4-t5]

At t4 the gate pulse of the clamp switch Sc1 is implemented. The operations that will happen in this mode are exactly the same that took place in the fourth mode.

2.6. Mode6 [t5-t6]

The clamp switch Sc1 turns off at t5 and then the parasitic capacitor energy Cs1 is delivered to the leakage inductance Lk1. A new resonant circuit is created by the switched capacitors Cm1 Cm2 and LLk1 and Cs1. As a result of this resonant circuit the changing slope of the leakage current is fixed. The voltage increment rate of the switch Sc1 is confined by Cs1; hence zero-voltage-switching operation of the switch Sc1 is achieved in turn-off interval.Equation

2.7. Mode 7 [t6-t7]

At t6 the drain-source voltage of the main switch S1 goes down to zero and its body diode Ds1 starts to conduct. The currents descending slope of the voltage rectifier stage diodes Dr1 and Dr2 depend on the inductance Lk1 and Lk2.Equation

2.8. Mode 8 [t7-t8]

At t7 the gate pulse of the main switch S1 is applied. As the current is passing through the switch before its gate pulse comes the zero-voltage turn-on performance is reached. The currents through the voltage rectifier stage Dr1 and Dr2 fall to zero at t8 and then the voltage rectifier stage diodes are stopped to conduct. The magnetizing inductance Lm1 and the leakage inductance Lk1 are charged by the input voltage in this interval.

The rest switching sequence starts at t8 and is similar to first half cycle except with commutation processes happen between S2 and Sc2 and the current goes through output diode Do in the voltage rectifier stage. Following this fact the series capacitor Cm1 and Cm2 are discharged and the energy is transferred to the output capacitor Co. The current flow-path in the voltage rectifier stage in the whole switching period is demonstrated in Fig.3.

3. CONVERTER STEADY STATE OPERATION ANALYSIS

To obtain converter design parameters some assumption are assumed as the voltage of the output capacitor the clamp capacitor and two switched capacitors Cm1 and Cm2 are considered constant during the whole switching period.

Also the parameters of the two coupled inductors are supposed the same. In addition two modes depended on the dead time between the switches gate pulses are ignored.

3.3. Soft Switching Qualification

The ZVS turn-on operation is another great feature of the investigated converter. As illustrated in section II the turn on soft switching is attained in mode 3 and 8 for switches Sc1 and S1 respectively. This performance is guaranteed if the energy stored in the leakage inductance at t7 be larger than the energy stored in the parasitic capacitor Cs1. The ZVS qualification of the main switches is expressed by

The relationship between the load current and the leakage inductance concern to implement the ZVS soft switching performance for two main switches S1 and S2 is sketched in Fig.7.

The descending slope of the output diode and the voltage rectifier cell diodes are moderated by the leakage inductance of the coupled inductor Lk which alleviates the reverse- recovery issue and meliorate the converter efficiency. From (10) the turn-off descending slope in mode 7 and 15 is given byEquation

4.2. Magnetizing inductance

In order to decrease the input current to the standard value the magnetizing inductor can be selected from (1) which is given byEquation

4.3. Leakage inductance The maximum leakage inductance to achieve real voltage gain can be concluded from (23) and the minimum leakage inductance guarantee the soft switching performance can be determined from (26) as follow:Equation

5. EXPERIMENTAL RESULTS

In order to demonstrate the effectiveness of the theoretical analysis a 1-kW laboratory prototype is established and its parameters are given in table 1. Fig.8 (a) to Fig.8 (e) shows the waveform of the proposed converter at full load state with 30V input voltage. The input current iin and the leakage inductances current iLk1 and iLk2 are displayed in Fig. 8 (a). It can be observed that the input current ripple is very low and a small capacitor can be employed as input filter so improve the performance and lifetime of the PV and FC systems. Fig.8 (b) illustrates and current and the drain- source voltage waveforms of the main switch S1. This fact can be revealed from waveforms that the ZVS operation of the main switch in turn-on state is attained. Because the drain-source voltage becomes zero firstly and afterward the main switch current flow in opposite direction. The waveforms of the clamp circuit current and voltage and the gate-source voltage of the clamp switch Sc2 are given in Fig.8 (c).

It is obvious that the leakage inductances current flows through the clamp circuit in turn-off that interval of the main switches and the drain source voltage of the switch sc2 is confined effectively to that of the capacitor Cc. The experimental waveforms of the voltage Vcm1 and the current icm1 on the switched capacitor Cm1 is shown in Fig.8 (d). The low ripples across capacitor voltage Vcm1 support the switched capacitor design procedure. The current and voltage waveforms of the voltage depicted in Fig.8 (e). It can be observed that the voltage stresses of the diodes are almost 190V and the diodes current in reversed-biased state is detracted to zero proximately hence the inverse-recovery problem is lightened. Fig .9 indicates the efficiency comparison with the investigated topology and the conventional interleaved converter at various loads with different input voltages. The highest efficiency of the proposed converter is 95.9% with 40V input voltage.

It can be seen that almost 8% efficiency development in the full load condition is achieved over the conventional interleaved converter.

6. CONCLUSION

A non-isolated interleaved converter with coupled inductor circuit is proposed for high step-up application. By merging a voltage rectifier stage with the interleaved coupled inductor based converter a new configuration with high voltage conversion ratio is derived. Employing the inpu parallel structure makes this converter appropriate for high current applications because the input current is divided between two paths. In order to confine the switches voltage in turn-off interval and accomplish the ZVS soft-switched operation the active clamp scheme is exerted. Also the leakage inductances of the coupled inductors are used to achieve ZCS performance of the diodes regulate the diode current descending rate and attenuate the reverse-recovery current. The analysis showed that there is a trade-off between the voltage gain and ZVS implementation. The design criterion is to decrease the leakage inductance as low as possible while keeping the zero voltage switching operation.

Finally a 1kW prototype converter is implemented to confirm the theoretical analysis.

TABLE 1.

PARAMETERS OF IMPLEMENTED CONVERTER.

Part###Value

Input Voltage Vin###30-45 V

Output Voltage Vo###380 V

Output Power Po###1000 W

Switching frequency fs###50 kHz

Turns ratio (N=n2/n1)###25/20

Main Switches (S1 and S2)###IRFP4227

Clamp Switches (Sc1 and Sc2)###IRFP4227

Voltage rectifier stage diodes (Dr1 Dr2 )

and Output diode (Do)

Clamp capacitor Cc###4.7F

Voltage rectifier Stage Capacitors(Cm1

and Cm2)###4.7F

Output Capacitor (Co)###470F

Parallel Capacitor (Cs1 and Cs2)###2.2nF

Magnetizing Inductors###200H

Leakage Inductances(Lk1 and Lk2)###3H

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ABSTRACT: A non-isolated interleaved boost converter with coupled inductors and switched-capacitor circuits is presented in this paper which can be employed for renewable energy conversion systems including the photovoltaic (PV) and the fuel cell (FC). Whereas the voltage generated by these sources is low a converter with high voltage conversion ratio is the main requirement for connection to a relatively high dc-bus voltage. To obviate this necessity a switched-capacitor circuit is magnetically connected to interleaved boost converter which effectively increases the voltage growth and decreases the voltage stress in the semiconductor components and thereby the conduction losses are diminished. In fact the proposed converter operates as a flyback converter in some times and forward converter in other times. To restrain the leakage energy of the coupled inductors and confine the voltage spikes on the main switches the active clamp technique is employed.

Furthermore the zero voltage switching (ZVS) operation is guaranteed even in the light load which leads to degradation of the switching losses. Also the leakage inductance of the coupled inductors is handled to realize zero-current-switching (ZCS) performance of the diodes. At last a 1-kW prototype is implemented to confirm the theoretical analysis and performance of the proposed topology.

Keywords: Active clamp circuit; coupled inductor; high step-up converter; interleaved boost converter; switched-capacitor LIST OF SYMBOLS

C capacitor

L inductor I current R resistor

t time

V voltage

ZCS zero current switching

ZVS zero voltage switching

1. INTRODUCTION

To solve energy problems as rapidly rising fossil fuels costs and environmental deterioration employing renewable energy sources including photovoltaic (PV) fuel cell (FC) wave as a major form of clean technology could be the benefit solution [12]. Between these sources system based PV and FC power are appropriate sources for the future energy challenge because of their significant merits as high efficiency low environmental impact and more reliable generated power [34]. But relative low output voltage is the main defect of these energy sources therefore existence of a converter with high voltage gain is essential to regulate and lift their output voltage to a higher level for grid connected application [5 6]. It is important therefore to discover and evaluate new DC/DC converters with fair low input current ripple high efficiency low voltage stress over the power devices and soft-switching achievement [7-9].

The first offer for this converter is the conventional interleaved parallel boost converter. The main advantage of designing a converter by means of interleaved parallel connected converter is that ripples cancellation in both the input and output waveforms. The dynamic response modification and the magnetic component volume reduction are other features of the interleaving structure [10]. But this topology still has some limitations that prevent using it in the high step up applications. To obtain greater voltage conversion ratio the interleaved boost converter needs to work in very high duty cycle which is inefficient and may cause some impairments [11]. The boost converters with coupled inductor are the preeminent solution that ensures high voltage gain while the switch works with low duty ratio [12-14]. Beside the duty cycle another design factor is provided to enlarge the voltage gain in proportion to the winding turns ratio. Thus the converter can easily attain high voltage gain;

meanwhile the switches tolerate less voltage stress. But the leakage energy is a destroyer factor in these topologies and causes high-voltage ripples across the switch during its turned-off period. To protect the switch devices and reuse the leakage energy either a MOSFET with high breakdown voltage and high drain-source resistance RDS(on) or the passive lossless clamp circuit usually adopted [15]. In fact the passive lossless clamp circuit makes this converter one of indispensable choices in some high voltage applications. But high voltage stress of the diode the electromagnetic interference (EMI) and high conduction losses are this topology major weakness. To overcome these drawbacks an additional resistorcapacitor diode (RCD) snubber has to be used [16]. The active-clamp circuit is another technique to keep down the switch voltage spike in turn-off duration which enables soft-switching procedure and reuses the leakage energy [17].

The switching losses are the main factor in the efficiency reduction [1819]. So the soft switching should be satisfied in the converters. Some topologies are introduced that attain higher voltage gain by employing the secondary side winding in series with the circuit output stage. In this converter a suitable turns ratio can be selected to earn a high voltage changeover ratio and low voltage stress over the switches [20]. Several topologies have been derived based on the concept of using the coupled inductors in combination with the voltage doubler rectifier circuit [21 22]. Merging the coupled inductor with the voltage multiplier cell is a good solution to wield the leakage energy degrade the power devices voltage stress and attain high voltage gain [23 24]. However the input current with large ripples would hamper their using in the high power cases. One of the best methods to improve

the input current ripple issue is the input-parallel coupled inductor based structure that is introduced in [25]. In order to obtain high voltage gain the secondary and tertiary windings are inserted in series to the output stage of the converter and operate as dc voltage sources that make this converter applicable for high voltage applications with large input current. These multiple windings make the converter bulky and complicate the design procedure and manufacturing.

In this paper a non-isolated ZVS high step-up dc/dc converter is investigated by employing a switched-capacitor circuit into the conventional interleaved coupled inductor based converter. To share the large input current attenuate the input current ripple and degrade the conduction losses interleaved coupled inductor configuration with asymmetrical pulse with modulation (PWM) control scheme is employed in the input side. Low input current ripple increases the fuel cell stack and the PV module lifetime. To prosper voltage gain ratio the coupled inductor secondary side winding are connected in series and operate as voltage source in proportion to turn ratio. Also a voltage rectifier cell composed of switched capacitor cells is embedded in the output side to achieve this target in the relative low value duty cycle. As a result the voltage stress in the power switches are reduced in proportionate to the turns ratio of the coupled inductors

and the MOSFETs with lower drain- source resistance can be employed which improves the converter efficiency.

The main merits of the proposed converter are listed as follows: 1) high voltage conversion ratio can be realized by merging two circuits that is the coupled inductor topology with the switched-capacitor circuit; 2) the coupled inductors transfer the input energy to the load or save in the switched- capacitors during whole switching period; 3) the leakage inductance controls the output diode and the switched- capacitor diodes current and this is why the reverse- recovery issue is mitigated and the efficiency is increased; 4) Soft switched performance is covered over the whole switching duration and can be fulfilled for both the main and the clamp switches.

After this reviewing section the operational principle of the proposed converter is presented in section 2 along with its theoretical waveforms. The design parameters are given in section 3. The converter design procedure is illustrated in Section 4 and the experimental waveforms are given in Section 5. The conclusion is given in the final section

2. THE PROPOSED CONVERTER AND ITS OPERATIONAL PRINCIPLE

The first stage of presented converter is conventional interleaved coupled inductor based converter with active clamp circuit while the second stage is a voltage rectifier stage composed of switched capacitor cells to provide high voltage conversion ratio. The first stage provides the continuous input current with low ripple and reuses the leakage energies of the coupled inductor. As demonstrated in Fig.1 the coupled inductor model consists of an ideal transformer the magnetizing inductance and the leakage inductance.

The parameter N is defined as turn ratio of n2/n1. The magnetic coupling method are depicted by " and " as shown in Fig. 1. The magnetizing inductors are applied paralleled in the input stage as the filter inductors and the secondary windings are inserted in series to the output stage of the circuit and operate as a voltage source to attain high voltage conversion ratio. The left dashed block consists of primary windings of the coupled inductors the main switches S1 and S2 the clamp switches Sc1 and Sc2 and the clamp capacitor Cc. The right dashed block consists of the secondary windings of the coupled inductors the series capacitor Cm1 and Cm2 and two diodes Dr1 and Dr2. Also Do is the output diode Vin is the input voltage and Vout is the output voltages and R is the load resistance. The theoretical waveforms of the proposed converter are illustrated in Fig.

2. Sixteen main modes exist in the operation of the investigated converter in the each switching period Ts. Due to symmetrical operation of the interleaved stage eight modes are studied preciously. The current-flow path corresponding to eight modes is shown.

2.1. Mode 1 [t0 t1]

Two switches S1 and S2 are turned-on and the voltage rectifier stage diodes Dr1 and Dr2 and the output diode Do are turned off in this time duration. The input current flows through the magnetizing inductors Lm1 and Lm2 and the leakage inductances Lk1 and Lk2 linearly. The magnetizing inductances Lm1 and Lm2 are charged by input voltage Vin.Equation

2.2. Mode 2 [t1-t2]

At t1 the main switch S1 is ceased to conduct. So the magnetizing inductance current iLm1 begins to charge the parasitic capacitor Cs1. As the parasitic capacitor Cs1 is very small all currents flow through it and drain-source voltage of the switch S1 is rising with constant rate contemporary. The amount of transferred charge depends on the capacitance of parasitic capacitor and thereby the parasitic capacitor controls the voltage variation slope. Therefore zero-voltage-switching operation of the main switch S1 in the turns-off state is realized.Equation

2.3. Mode 3 [t2-t3]

At t2 the drain-source voltage of the clamp switch Sc1 is fallen to zero and its body diode Ds2 starts to conduct. At this moment the current is flowing through the switches in the opposite direction and the voltage of the clamp switch Sc1 keeps as zero while its gate signal is not applied. This implies the zero-voltage turn-on of the clamp switch Sc1 is attained. The difference between the input voltage Vin and the clamp capacitor voltage VCc makes the magnetizing inductances Lm1 to discharge.

2.4. Mode 4 [t3-t4]

At t3 the voltage across the voltage rectifier stage diodes Dr1 and Dr2 fall to zero and then the coupled inductors transmit the input energy to series capacitor Cm1 and Cm2. A resonant circuit is formed composed of the series capacitors Cm1 Cm2 the clamp capacitor Cc and the leakage inductance of the coupled inductor Lk1. Because of considerably large resonant period the current iLk1 is going up about linearly in this mode. The current through S2 is summation of the magnetizing inductor current and reflected the secondary winding current. The upper coupled inductor operation is similar to forward converter and the lower one performance is similar to flyback converter.

2.5. Mode 5 [t4-t5]

At t4 the gate pulse of the clamp switch Sc1 is implemented. The operations that will happen in this mode are exactly the same that took place in the fourth mode.

2.6. Mode6 [t5-t6]

The clamp switch Sc1 turns off at t5 and then the parasitic capacitor energy Cs1 is delivered to the leakage inductance Lk1. A new resonant circuit is created by the switched capacitors Cm1 Cm2 and LLk1 and Cs1. As a result of this resonant circuit the changing slope of the leakage current is fixed. The voltage increment rate of the switch Sc1 is confined by Cs1; hence zero-voltage-switching operation of the switch Sc1 is achieved in turn-off interval.Equation

2.7. Mode 7 [t6-t7]

At t6 the drain-source voltage of the main switch S1 goes down to zero and its body diode Ds1 starts to conduct. The currents descending slope of the voltage rectifier stage diodes Dr1 and Dr2 depend on the inductance Lk1 and Lk2.Equation

2.8. Mode 8 [t7-t8]

At t7 the gate pulse of the main switch S1 is applied. As the current is passing through the switch before its gate pulse comes the zero-voltage turn-on performance is reached. The currents through the voltage rectifier stage Dr1 and Dr2 fall to zero at t8 and then the voltage rectifier stage diodes are stopped to conduct. The magnetizing inductance Lm1 and the leakage inductance Lk1 are charged by the input voltage in this interval.

The rest switching sequence starts at t8 and is similar to first half cycle except with commutation processes happen between S2 and Sc2 and the current goes through output diode Do in the voltage rectifier stage. Following this fact the series capacitor Cm1 and Cm2 are discharged and the energy is transferred to the output capacitor Co. The current flow-path in the voltage rectifier stage in the whole switching period is demonstrated in Fig.3.

3. CONVERTER STEADY STATE OPERATION ANALYSIS

To obtain converter design parameters some assumption are assumed as the voltage of the output capacitor the clamp capacitor and two switched capacitors Cm1 and Cm2 are considered constant during the whole switching period.

Also the parameters of the two coupled inductors are supposed the same. In addition two modes depended on the dead time between the switches gate pulses are ignored.

3.3. Soft Switching Qualification

The ZVS turn-on operation is another great feature of the investigated converter. As illustrated in section II the turn on soft switching is attained in mode 3 and 8 for switches Sc1 and S1 respectively. This performance is guaranteed if the energy stored in the leakage inductance at t7 be larger than the energy stored in the parasitic capacitor Cs1. The ZVS qualification of the main switches is expressed by

The relationship between the load current and the leakage inductance concern to implement the ZVS soft switching performance for two main switches S1 and S2 is sketched in Fig.7.

The descending slope of the output diode and the voltage rectifier cell diodes are moderated by the leakage inductance of the coupled inductor Lk which alleviates the reverse- recovery issue and meliorate the converter efficiency. From (10) the turn-off descending slope in mode 7 and 15 is given byEquation

4.2. Magnetizing inductance

In order to decrease the input current to the standard value the magnetizing inductor can be selected from (1) which is given byEquation

4.3. Leakage inductance The maximum leakage inductance to achieve real voltage gain can be concluded from (23) and the minimum leakage inductance guarantee the soft switching performance can be determined from (26) as follow:Equation

5. EXPERIMENTAL RESULTS

In order to demonstrate the effectiveness of the theoretical analysis a 1-kW laboratory prototype is established and its parameters are given in table 1. Fig.8 (a) to Fig.8 (e) shows the waveform of the proposed converter at full load state with 30V input voltage. The input current iin and the leakage inductances current iLk1 and iLk2 are displayed in Fig. 8 (a). It can be observed that the input current ripple is very low and a small capacitor can be employed as input filter so improve the performance and lifetime of the PV and FC systems. Fig.8 (b) illustrates and current and the drain- source voltage waveforms of the main switch S1. This fact can be revealed from waveforms that the ZVS operation of the main switch in turn-on state is attained. Because the drain-source voltage becomes zero firstly and afterward the main switch current flow in opposite direction. The waveforms of the clamp circuit current and voltage and the gate-source voltage of the clamp switch Sc2 are given in Fig.8 (c).

It is obvious that the leakage inductances current flows through the clamp circuit in turn-off that interval of the main switches and the drain source voltage of the switch sc2 is confined effectively to that of the capacitor Cc. The experimental waveforms of the voltage Vcm1 and the current icm1 on the switched capacitor Cm1 is shown in Fig.8 (d). The low ripples across capacitor voltage Vcm1 support the switched capacitor design procedure. The current and voltage waveforms of the voltage depicted in Fig.8 (e). It can be observed that the voltage stresses of the diodes are almost 190V and the diodes current in reversed-biased state is detracted to zero proximately hence the inverse-recovery problem is lightened. Fig .9 indicates the efficiency comparison with the investigated topology and the conventional interleaved converter at various loads with different input voltages. The highest efficiency of the proposed converter is 95.9% with 40V input voltage.

It can be seen that almost 8% efficiency development in the full load condition is achieved over the conventional interleaved converter.

6. CONCLUSION

A non-isolated interleaved converter with coupled inductor circuit is proposed for high step-up application. By merging a voltage rectifier stage with the interleaved coupled inductor based converter a new configuration with high voltage conversion ratio is derived. Employing the inpu parallel structure makes this converter appropriate for high current applications because the input current is divided between two paths. In order to confine the switches voltage in turn-off interval and accomplish the ZVS soft-switched operation the active clamp scheme is exerted. Also the leakage inductances of the coupled inductors are used to achieve ZCS performance of the diodes regulate the diode current descending rate and attenuate the reverse-recovery current. The analysis showed that there is a trade-off between the voltage gain and ZVS implementation. The design criterion is to decrease the leakage inductance as low as possible while keeping the zero voltage switching operation.

Finally a 1kW prototype converter is implemented to confirm the theoretical analysis.

TABLE 1.

PARAMETERS OF IMPLEMENTED CONVERTER.

Part###Value

Input Voltage Vin###30-45 V

Output Voltage Vo###380 V

Output Power Po###1000 W

Switching frequency fs###50 kHz

Turns ratio (N=n2/n1)###25/20

Main Switches (S1 and S2)###IRFP4227

Clamp Switches (Sc1 and Sc2)###IRFP4227

Voltage rectifier stage diodes (Dr1 Dr2 )

and Output diode (Do)

Clamp capacitor Cc###4.7F

Voltage rectifier Stage Capacitors(Cm1

and Cm2)###4.7F

Output Capacitor (Co)###470F

Parallel Capacitor (Cs1 and Cs2)###2.2nF

Magnetizing Inductors###200H

Leakage Inductances(Lk1 and Lk2)###3H

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Article Type: | Report |

Date: | Feb 28, 2015 |

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