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A Current Mode Design of Fractional Order Universal Filter.

I. INTRODUCTION

Fractional calculus is a general form of the classical integer order calculus. It has gained more interest recently because of its capability of better modeling and design of a system. Fractional order calculus has been emerged in engineering, biology, control theory etc. With entering fractional calculus into area of electronics, fractional analogue filters, oscillators, controllers and differentiators-integrators have been found [1-7].

Active filters in integrated circuit form have been used in analog applications. They can be classified as current mode (CM) and voltage mode (VM). CM operation can provide higher operation frequency, high slew rate, simple circuitry and wide dynamic range with respect to VM operation. Also, operations such as adding, subtracting are simple. When CM devices are considered for filters; current conveyors (CCs), current followers (CFs) and gain cells (GCs) have been commonly used in literature [8-9]. As in many applications, the electronically tuning property is also desired for filters. In such cases, operational transconductance amplifiers (OTAs) are widely employed [10-11].

Filters are generally designed by considering their transfer functions instead of their time domain equations. Similar approach is also valid for fractional order filters [12]. In the design of the fractional order filters, fractional Laplacian operator [s.sup.[beta]] (0 < [beta] < 1) has been used [13]. But, a commercial device meeting the characteristics of this operator is unavailable. To solve this problem, two different approaches can be followed. One of the approaches is based on emulating [s.sup.[beta]] via R-C networks. This way is preferred in the design of a lot of VM fractional order filters where active building blocks of operational amplifiers (OPAMPs), CCs, current feedback operational amplifiers (CFOAs) etc. are used [14-18]. The main drawback of these circuits is absence of electronically tuning of R and C values. The other approach depends on the approximation of fractional Laplacian operator [s.sup.[beta]] by the integer order transfer functions that are valid in a limited frequency band. By substituting these approximation functions of [s.sup.[beta]] into fractional order filter functions, integer order transfer functions are derived and then the final transfer functions are implemented with active blocks and integrators. Performing this approach, different VM and CM filters have been proposed where field programmable analogue array (FPAA), single amplifier biquad (SAB), differential difference current conveyors (DDCCs), current mirrors, CFOAs, CFs, adjustable current amplifiers (ACAs) and OTAs are utilized [13, 19-30]. Some of the proposed filter circuits support electronically tuning of filter parameters but they need high supply voltage as well as high-power. On the other hand, some of them support both electronically tuning of filter parameters and low-voltage low-power operation; however, they do not offer a general filter topology that high-pass (HP), low-pass (LP), band-pass (BP) and band-reject (BR) filter responses can be achieved at the same circuit. Due to these reasons, there is a need of a CM general filter topology that meets the desired properties given above.

In this paper, a CM fractional order generalized filter topology order of (1 + [beta]), which is designed and simulated by using OTAs and a CF as active devices, has been proposed. The main contribution made in this paper is that the proposed CM general topology provides different filter responses at the same circuit. At the same time, it supports low-voltage design principle. Furthermore, it is capable of electronically tuning of filter parameters, filter order and cut-off frequency. Additionally, it is based on resistor-less and grounded capacitors realization. So as to compare proposed filter topology with the others in the literature, some of prominent features of these circuits are given in Table 1. It can be observed from Table 1 that proposed circuit outperform the ones in [13, 19, 30] in terms of total counts of active and passive components as well as integration compatibility. Additionally, proposed filter topology supports electronic tuning as well as four different filter responses in contrast to the works in [13, 19, 30]. Although the studies in [21, 23, 28, 29] have the property of electronic tunability, they do not provide all the fractional LP, HP, BP and BR filter responses. The work in [27] has advantages of electronic tuning and availability of four different filter responses. But it is based on VM design. On the other hand, in addition to mentioned advantages of proposed topology above, the proposed filters also have advantages of integration capability, good slope of the stop-band attenuation and CM design.

II. GENERAL DESIGN STEPS FOR CM FRACTIONAL FILTERS OF ORDER (1 + B)

The transfer function of the approximated fractional Butterworth low-pass filter of order (1 + [beta]) is given by [20]

[H.sup.fLPF.sub. 1 + [beta] (s) = [c.sub.1]/[s.sup.[beta]] (s + [c.sub.2]) + [c.sub.3] (1)

where [c.sub.1], [c.sub.2] and [c.sub.3] are coefficients determined by nonlinear curve fitting by minimizing the pass-band error between 1st order Butterworth filter and the (1 + [beta]) order fractional low-pass filter responses.

To realize the transfer function (1), fractional order Laplacian operator [s.sup.[beta]] is replaced by its integer order approximation function derived by using Continued Fraction Expansion (CFE). Although a number of approximation methods like Carlson, Oustaloup, Matsuda and Charef method have been introduced in literature, the CFE method is preferred in this study from the circuit complexity point of view [6]. According to the CFE method, the second order approximation expression is defined as

[s.sup.[beta]] [congruent to]([[beta].sup.2] + 3[beta] +2)[s.sup.2] + (8 - 2[[beta].sup.2])s + ([[beta].sup.2] - 3[beta] + 2)/([[beta].sup.2] - 3[beta] + 2)[s.sup.2] + (8 - 2[[beta].sup.2])s + ([[beta].sup.2 + 3[beta] + 2) (2)

Substituting (2) into (1), the transfer function of (1 + [beta]) order fractional low-pass filter is derived as

[H.sup.fLPF.sub.1+[beta]] (s) [congruent to] [c.sub.1]/[m.sub.0]([m.sub.2][s.sup.2] + [m.sub.1] s + [m.sub.0])/[s.sup.3] + [k.sub.0][s.sup.2] + [k.sub.1]s + [k.sub.2] (3)

The expressions for coefficients [m.sub.i] (i = 0, 1, 2) and [k.sub.i] (i = 0, 1, 2) are given by

[m.sub.0] = [[beta].sup.2] + 3[beta] + 2 [m.sub.1] = 8 - 2[[beta].sup.2] [m.sub.2] = [[beta].sup.2] - 3[beta] + 2 (4) [k.sub.0] = ([m.sub.1] + [m.sub.0][c.sub.2] + [m.sub.2] [c.sub.3])/ [m.sub.0] [k.sub.1] = ([m.sub.1][c.sub.2] + [c.sub.3] + [m.sub.2])/[m.sub.0] [k.sub.2] = ([m.sub.0] [c.sub.3] + [m.sub.2] [c.sub.2])/ [m.sub.0]

To realize the transfer function of (3), a block scheme of the follow-the leader-feedback with the output summation topology (BS-FLF-OS) can be employed [24]. The BS-FLF-OS topology is shown in Fig. 1 and the transfer function of this topology is expressed as

H(s) = [B.sub.3][s.sup.3] + [B.sub.2] [T.sub.1] [s.sup.2] + [B.sup.1] [T.sub.1][T.sub.2] s + [B.sub.0]/ [T.sub.1][T.sub.2][T.sub.3]/[s.sup.3] + 1/[T.sub.1] [s.sup.2] + 1/[T.sub.1][T.sub.2] s + 1/[T.sub.1][T.sub.2][T.sub.3] (5)

where [B.sub.i] (i = 0, 1, 2) and [T.sub.i] (i = 1, 2, 3) correspond to gain and time constants, respectively. By equating (3) with (5), it can be obtained that

[B.sub.3] = 0, [B.sub.2] = [c.sub.1][m.sub.2]/[k.sub.0][m.sub.0], [B.sub.1] = [c.sub.1][m.sub.1]/[k.sub.1][m.sub.0], [B.sub.0] = [c.sub.1]/[k.sub.2] (6)

[T.sub.1] = 1/[k.sub.0], [T.sub.2] = [k.sub.0]/[k.sub.1], [T.sub.3] = [k.sub.1]/[k.sub.2]

The transfer functions of the approximated fractional Butterworth high-pass, band-pass and band-reject filters of order (1 + [beta]) are given as [15]

[H.sup.fHPF.sub.1 + [beta]] (s) = [c.sub.1] [s.sup.[beta]+1]/[s.sup.[beta]] (s + [c.sub.2]) + [c.sub.3] (7)

[H.sup.fHPF.sub.1 + [beta]] (s) = [c.sub.1][c.sub.2][s.sup.[beta]]/[s.sup.[beta]] (s + [c.sub.2]) + [c.sub.3] (8)

[H.sup.fHPF.sub.1 + [beta]] (s) = [c.sub.1] [s.sup.[beta]+1] + [c.sub.1][c.sub.3]/[s.sup.[beta]] (s + [c.sub.2]) + [c.sub.3] (9)

By performing the similar procedure followed from (1) to (3), the transfer function of (1 + [beta]) order approximated fractional high-pass, band-pass and band-reject filters are obtained as

[H.sup.fHPF.sub.1 + [beta]] (s) [congruent to] [B.sub.3][s.sup.3] + [B.sub.2]/[T.sub.1] [s.sup.2] + [B.sub.1]/[T.sub.1][T.sub.2] s/[s.sup.3] + 1/[T.sub.1] [s.sup.2] + 1/[T.sub.1][T.sub.2] s +1/[T.sub.1][T.sub.2][T.sub.3] (10)

[H.sup.fHPF.sub.1 + [beta]] (s) [congruent to] [B.sub.2]/[T.sup.1] + [s.sup.2] + [B.sub.1]/[T.sub.1][T.sup.2] s + [B.sub.0]/[T.sub.1][T.sub.2][T.sub.3]/[s.sup.3] + 1/[T.sub.1] [s.sup.2] + 1/[T.sub.1][T.sub.2] s +1/[T.sub.1][T.sub.2][T.sub.3] (11)

[H.sup.fHPF.sub.1 + [beta]] (s) [congruent to] [B.sub.2][s.sup.3] + [B.sub.2]/[T.sub.1] [s.sup.2] + [B.sub.1]/[T.sub.1][T.sub.2] s +[B.sub.0]/[T.sub.1] [s.sup.2] + 1/[T.sub.1] [s.sup.2]s + 1/[T.sub.1][T.sub.2][T.sub.3] (12)

While the time constants [T.sub.i] (i = 1, 2, 3) are same in (6), the gain expressions for high-pass, band-pass and band-reject filters are given as

[B.sub.3] = [c.sub.1, [B.sub.2] = [c.sub.1][m.sub.1]/[k.sub.0][k.sub.0], [B.sub.1] = [c.sub.1][m.sub.2]/[k.sub.1][m.sub.0], [B.sub.0] = 0 (13)

[B.sub.3] = 0, [B.sub.2] = [c.sub.1][c.sub.2]/[k.sub.0], [B.sub.1] = [c.sub.1][c.sub.2][m.sub.1]/[k.sub.1][m.sub.0], [B.sub.0] = [c.sub.1][c.sub.2][m.sub.2]/[k.sub.2][m.sub.0] (14)

[B.sub.3] = [c.sub.1], [B.sub.2] = [c.sub.1][m.sub.1] + [c.sub.1][c.sub.3][m.sub.2]/[k.sub.0][m.sub.0],

[B.sub.1] = [c.sub.1][m.sub.2] + [c.sub.1][c.sub.3][m.sub.1]/[k.sub.1][m.sub.0], [B.sub.0] = [c.sub.1][c.sub.3]/[k.sub.2] (15)

The realization of the fractional filters of order (n + [beta]) (where n > 1) could be possible by cascade connecting of (1 + [beta]) order fractional filter [H.sup.fF.sub.1 + [beta]](s) and Butterworth filter of order (n - 1) as depicted in Fig. 2 [19].

III. REALIZATION OF CM FRACTIONAL FILTERS OF ORDER (1 + B) USING OTAS AND CFS

To realize the general topology depicted in Fig. 1, it can be seen clearly that integrators and a multi-output current follower (CF) are required. All of these required circuits can be realized by just using OTAs but it is not efficient from devices counts point of view. So, different active devices are preferred. While OTA-C structure is used for the integration and current amplification, a current follower is chosen for the multi-output copy of the input current.

The used complementary metal oxide semiconductor (CMOS) OTA structure is shown in Fig. 3. It is chosen due to the balanced dual outputs [25]. The transconductance expression of the chosen OTA is

[g.sub.m] = [g.sub.m1][g.sub.m2]/[g.sub.m1] + [g.sub.g2] + [g.sub.m3][g.sub.m4]/[g.sub.m3] + [g.sub.g4] [congruent to] [g.sub.m1] +g.sub.m3]/2 (16)

where the [g.sub.mi] = [[I.sub.B][micro]C[O.sub.ox]W/L]1/2 (i = 1, 2, 3, 4) and the parameters [I.sub.B], [micro], [C.sub.ox], W and L are respectively the bias current source, the carrier mobility, the gate oxide capacitance per unit area, the width and length of the related MOS transistor.

To perform current amplification for the coefficient [B.sub.3], the small signal input current is converted to a voltage by means of 1/[g.sub.m7] stage. Then, the induced voltage is converted to desired current level by means of [g.sub.m8] = [B.sub.3][g.sub.m7] stage.

To achieve multi-output copy of the input current, the circuit pictured in Fig. 4 is used [26]. Transistors [M.sub.1]-[M.sub.9] form the low-input resistance unity gain amplifier. Therefore, output currents equal to input current.

The proposed topology designed with active devices introduced above is demonstrated in Fig. 5. The related time and gain constants can be written as

[T.sub.i] = [C.sub.i]/[g.sub.mi] (17)

[B.sub.3] = [g.sub.m8]/[g.sub.m7], [B.sub.2] = [g.sub.m6]/[g.sub.m1], [B.sub.1] = [g.sub.m5]/[g.sub.m2], [B.sub.0] = [g.sub.m4]/[g.sub.m3] (18)

where [C.sub.i] (i = 1, 2, 3) and [g.sub.mj] (j = 1, 2, 3, 4, 5, 6, 7, 8) are integration capacitors and transconductance values, respectively.

IV. SIMULATION

The simulations of the proposed approximated fractional filters of order (1 + [beta]) are carried out using SPICE with 0.35[micro]m TSMC CMOS technology parameters, while their corresponding transfer functions are simulated numerically. Then both of the results are presented in the same figure. The supply voltages [V.sub.DD] and [V.sub.CC] are employed as + 0.75 V and - 0.75 V. Integration capacitors of 10pF and half power frequency of 10kHz are selected in simulations and the parameters as well as bias currents are calculated by taking these values into consideration. Accordingly, using equations (4-6) and (13-15), the calculated time and gain constants for different fractional order filter responses are given in Table 2. The required bias currents for OTAs are provided in Table 3. The bias current [I.sub.B] of the CF is 1[micro]A.

To simulate fractional order low-pass filters, the bias currents of [g.sub.m7] and [g.sub.m8] have to be equal to zero and thereby [B.sub.3] goes to zero and (3) can become realizable. By following this step, the simulated frequency responses of low-pass filters for [beta] = 0.5 and [beta] = 0.8 are portrayed in Fig. 6 along with their corresponding theoretical results. It can be clearly seen that the stop-band attenuation changes according to - 20 x (1 + [beta]) dB/dec, which depends on the fractional order [beta]. In addition, there is a close match between simulated and theoretical values. The derived slope of stop-band attenuations for [beta] = 0.5 and [beta] = 0.8 are respectively -30.4 dB/dec and - 36.7 dB/dec which are close to theoretical values of - 20 x (1.5) dB/dec = - 30 dB/dec and -20 x (1.8) dB/dec = - 36 dB/dec. The simulated power dissipations of low-pass filters of orders 1.5 and 1.8 are calculated as 8.74[micro]W and 8.69[micro]W, respectively. If the CF is bypassed and the feedback currents together with the input current are applied on the capacitor [C.sub.1] directly, the power dissipations of the filters of orders 1.5 and 1.8 decrease to 428nW and 381nW, respectively. Thus, the proposed filter topologies can be suitable for low-power applications.

A fixed amplitude of 1nA and variable frequency sinusoidal input signal is applied to the fractional order low-pass filters for evaluation of output Total Harmonic Distortion (THD) level. The THD levels for [beta] = 0.5 and [beta] = 0.8 remain below 0.11% and 0.26% respectively within the range of 0.1kHz to 10kHz. On the other hand, when a fixed frequency of 1kHz and variable amplitude sinusoidal input signal is applied to the fractional low-pass filters, the THD levels for [beta] = 0.5 and [beta] = 0.8 do not exceed 0.33% and 0.27% up to 5nA input amplitude, respectively. Therefore, it can be said that the THD performance of the low-pass filters is good enough. In order to observe the time domain performance of the low-pass filter of order [beta] = 0.5, a 1kHz sinus with 5nA amplitude is applied. The realized output signal is shown in Fig. 7.

The frequency domain responses of 1.5 and 1.8 orders high-pass filters with [B.sub.0] = 0 (obtained by making [g.sub.m4] = 0) are depicted in Fig. 8. The simulation and theoretical results are close each other. The derived slope of stop-band attenuations for [beta] = 0.5 and [beta] = 0.8 are respectively - 29 dB/dec and - 35.7 dB/dec which are close to theoretical values of - 20 x (1.5) dB/dec = - 30 dB/dec and - 20 x (1.8) dB/dec = - 36 dB/dec. The power consumption of high-pass filters for [beta] = 0.5 and [beta] = 0.8 are derived as 8.81[micro]W and 8.72[micro]W, respectively.

To evaluate the output THD levels of fractional order high-pass filters, a fixed amplitude of 5nA and variable frequency sinusoidal signal is applied to the filters as an input. The THD levels for [beta] = 0.5 and [beta] = 0.8 remain below 0.67% and 0.83% respectively within the range of 50kHz to 500kHz. On the other hand, when a fixed frequency of 100kHz and variable amplitude sinusoidal signal is applied to the fractional high-pass filters as an input, the THD levels for [beta] = 0.5 and [beta] = 0.8 do not exceed 0.31% and 0.34% respectively within the range of 10nA to 50nA. Therefore, it can be said that the THD performance of the high-pass filters is reasonable. To observe the time domain performance of the high-pass filter of order [beta] = 0.8, a 100kHz sinus with 50nA amplitude is applied. The realized output signal is shown in Fig. 9.

The simulated responses of fractional band-pass and band-reject filters for [beta] = 0.5 and 0.8 are shown in Fig. 10 and 11, respectively.

The electronic adjustment of order of proposed filters can be clearly seen from below figures. Additionally, the electronic tuning of filter frequency is presented in Fig. 12 for the case of band-reject filters. To adjust the filter frequency for [beta] = 0.5, the bias currents [I.sub.bi] (i = 1, 2, 3, 4, 5, 6) different from current values given in Table 2 are changed to 289.6nA, 119nA, 30.4nA, 26nA, 67.1nA and 224.5nA, respectively.

V. EXPERIMENTAL RESULTS

In order to show applicability of the introduced filters, the fractional low-pass filter of order [beta] = 0.5 is chosen due to the fact that the coefficient [B.sub.3] is equal to 0 for the LP filters and thus the CF, [U.sub.7] and [U.sub.8] can be removed. The fractional LP filter is implemented by discrete form commercially available devices of LT1228 and AD844AN as well as passive components of R-C. To achieve the balanced dual output currents, two LT1228 OTAs are employed for each integrator block shown in Fig. 5. So as to produce input current, the AD844AN is used as a voltage to current convertor. The experimental setup of the built circuit is portrayed in Fig. 13. The capacitor value of 5.6nF is selected for integrators. The half power frequency is 62.8krad/s (10kHz). The calculated transconductances for [U.sub.1], [U.sub.2], [U.sub.3], [U.sub.4], [U.sub.5] and [U.sub.6] are respectively 1.02mS, 405[micro]S, 104[micro]S, 105[micro]S, 243[micro]S and 71[micro]S. The obtained results for the FLF are given in Fig. 14. As it can be observed from this figure that the experimental results verify the simulated results and the introduced concepts. It can also be seen from the Fig. 14 that there is some deviation between experimental and simulated results because of passive component tolerances and non-ideal characteristics of active devices.

VI. CONCLUSION

A CM generalized approximated fractional order filter topology is introduced. Step by step design equations are presented in an algorithmic way. To realize the introduced topology, a circuit based on OTAs and a CF as active elements is proposed. The functionality of the proposed circuit topology is verified through simulations and implementation. The proposed circuit permits electronic tuning of order, coefficients and frequency response of the related filters. Furthermore, the proposed circuit uses only grounded capacitors and provides the low-voltage operation. Additionally, different fractional order filter responses can be realized at the same circuit without any structural change. Thus, the proposed circuit topology could be a good candidate for the realization of the current mode fractional order filters.

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Ibrahim Ethem SACU (1), Mustafa ALCI (2)

(1) Institute of Natural and Applied Sciences, Erciyes University, 38039, Turkey

(2) Department of Electrical and Electronics Engineering, Erciyes University, 38039, Turkey

iesacu@erciyes.edu.tr

This work was supported by Research Fund of the Erciyes University. Project Number: FDK-2018-8374.
TABLE 1. COMPARISON OF PROMINENT FEATURES OF THE SOME REPORTED
FRACTIONAL ORDER FILTERS

      Active    Passive      Filter  Filter   Electronic
Ref.  elements  elements     order   types    control     Topology
      (number)  (number)

[13]  OA(2)     R(10), C(3)  3       LP       No          N/A
[19]  DDCC(5)   R(7), C(3)   3       LP       No          IFLF
[21]  Current   C(3)         3       LP       Yes         FLF
      mirror
      OTA(3),
[23]  CF(1),    C(3)         3       HP       Yes         FLF-OS
      ACA(2)
                                     LP, HP,
[27]  OTA(11)   C(4)         4       BR,      Yes         IFLF-ID
                                     BP
      CF (5),   R(3),        3       LP                   FTF
      ACA (5)   C(3)
      OTA (3),
[29]  CF (2),   C(3)         3       LP, HP   Yes         FLF
      ACA (3)
[30]  CFOA(4)   R(10), C(3)  3       LP       No          FLF-OS
                                     LP, HP,
This  OTA(8),   C(3)         3       BR,      Yes         FLF-OS
work  CF(1)                          BP

       Supply        Filter  Cutoff   Total
Ref.   voltages      mode    freq.    capaeitanee  Power (*)

[13]   N/A           VM      1 kHz    300 nF       N/A
[19]   [+ or -]0.5V  VM      1.7 kHz  11.569 nF    185 [micro]W
[21]   0.5V/Gnd      CM      10 Hz    90 pF        0,82 nW
                                      180 pF       2,05 nW
[23]   N/A           CM      100      5.37 nF      N/A
                             kHz
[27]   1.5V/Gnd      VM      100 Hz   200 pF       N/A
       N/A           CM      100      508 pF       N/A
                             kHz
                             100
[29]   N/A           CM      kHz      20.27 nF     N/A
[30]   [+ or -] 10V  VM      10 kHz   7.18 nF      N/A
This   [+ or -] 10V  CM      10 KHZ   30 pF        8.74 [micro]W
work                                               (428 nW (**))

(*) Power consumption values of the low-pass filters order of
[beta] = 0.5

(**) When the CF is bypassed

TABLE II. THE CALCULATED TIME CONSTANTS AND GAIN FACTORS BY TAKING
FREQUENCY 10KHZ AND CAPACITOR VALUE OF 10PF

                  [beta] = 0.5
                  [B.sub.0]           [B.sub.1]         [B.sub.2]

LP                1.014               0.600             0.069
HP                -                   0.06              0.691
BP                0.147               0.435             0.251
BR                0.853               0.564             0.749

                  [T.sub.1]           [T.sub.2]         [T.sub.3]
LP, HP, BP, BR    5.5x[10.sup.-6]     14x[10.sup.-6]    54x[10.sup.-6]

                  [beta] = 0.5      [beta] = 0.8
                  [B.sub.3]        [B.sub.0]           [B.sub.1]

LP                -                1.006               0.473
HP                1                -                   0.017
BP                -                0.055               0.539
BR                0.841            0.945               0.461

                  -                [T.sub.1]           [T.sub.2]
LP, HP, BP, BR    -                6.32x[10.sup.-6]    14x[10.sup.-6]

                  [beta] = 0.8
                  [B.sub.2]         [B.sub.3]

LP                0.019             -
HP                0.529             1
BP                0.453             -
BR                0.547             0.94

                  [T.sub.3]         -
LP, HP, BP, BR    45x[10.sup.-6]    -

TABLE III. THE REQUIRED BIAS CURRENTS FOR OTAS

                 [beta] = 0.5
                 [I.sub.b4] (nA)    [I.sub.B5] (nA)    [I.sub.B6] (nA)

LP                15.4              35.6                 10.2
HP                -                  3.5                103.2
BP                 2.2              25.8                 37.3
BR                12.9              33.5                 112

                 [I.sub.b2]         [I.sub.b2]          [I.sub.b3]
LP, HP, BP, BR   149.6 nA           59.4 nA             15.2 nA

                 [beta] = 0.5       [beta] = 0.8
                 [I.sub.B4] (nA)    [I.sub.B5] (nA)

LP               18.2               27.2
HP               -                   1
BP               31.1               58.8
BR
                 17.1               26.6

                 [I.sub.b1]         [I.sub.b2]
LP, HP, BP, BR   130.3 nA           57.7 nA

                  [beta] = 0.8
                  [I.sub.B6] (nA)    [I.sub.B7], [I.sub.B8] (nA)

LP                 2.4               -
HP                68.7               35.6
BP                -
BR
                  71.1               37.9,
                                     35.6

                  [I.sub.b3]         -
LP, HP, BP, BR    18.1 nA            -
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Author:Sacu, Ibrahim Ethem; Alci, Mustafa
Publication:Advances in Electrical and Computer Engineering
Article Type:Report
Date:Feb 1, 2019
Words:5091
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