Ziatech Brings Multiprocessing Capability to CompactPCI With Introduction of New Processor Board Featuring Intel Pentium II Mobile Module.SAN LUIS OBISPO San Luis Obispo (săn l  `ĭs ōbĭs`pō), city (1990 pop. 41,958), seat of San Luis Obispo co., S Calif., near San Luis Obispo Bay; inc. 1856. , Calif.--(BUSINESS WIRE)--Oct. 7, 1998--The CompactPCI bus moved closer to complete multiprocessing capability Wednesday as Ziatech Corp., the standard's creator, introduced the first CompactPCI multiprocessing-capable processor board featuring the Intel Pentium II processor mobile module. Features Intel Pentium II Mobile Module In addition to its unique multiprocessing capability and use of the Intel Pentium II processor mobile module, Ziatech's new ZT 5540 Peripheral CPU CPU in full central processing unit Principal component of a digital computer, composed of a control unit, an instruction-decoding unit, and an arithmetic-logic unit. Board features a full set of embedded features, and compliance to the new CompactPCI hot swap standard. This powerful feature set makes it an ideal processor engine for telecommunications or industrial automation applications requiring exceptional performance, distributed processing and high availability. "The Intel Pentium II processor mobile module and PCI-to-PCI bridge, combined on Ziatech's new processor board, gives designers a good solution for CompactPCI multiprocessing," said Tom Franz, vice-president and general manager at Intel's Embedded Microcomputer Division. The ZT 5540 is designed to operate in CompactPCI/MP, Ziatech's multiprocessing architecture that accommodates a system master CPU and up to 31 peripheral masters such as the ZT 5540. Single processor CompactPCI systems use transparent PCI (1) (Payment Card Industry) See PCI DSS. (2) (Peripheral Component Interconnect) The most widely used I/O bus (peripheral bus). bridge chips to map on-board PCI addresses directly to CompactPCI bus addresses in one uniform memory map. In a CompactPCI multiprocessing system, a peripheral master CPU (such as the ZT 5540) communicates with other CPUs through a non-transparent PCI-to-PCI bridge that maps its local address to the CompactPCI bus. The ability of peripheral master CPUs to communicate directly with each other without having to communicate through a system master CPU is called "full-mesh connectivity." A Key Component in Ziatech's CompactPCI/MP Multiprocessing System "Multiprocessing brings a new paradigm of performance to CompactPCI," said Greg Kopchinski, Ziatech Product Manager. "Instead of single processor systems requiring faster and faster CPUs, distributed multiprocessing allows system designers to assign processing performance to different tasks, much like a network in a box," Kopchinski continued. A typical application for a CompactPCI multiprocessing system involves a complex protocol processor or call logging system that requires a modular and scalable implementation. The protocol processor application resides on one (or more) peripheral masters in the system. For example, a peripheral CPU master such as the ZT 5540 processes incoming SS7 data to perform country-specific protocol conversion. Once processed, the SS7 data is re-transmitted from the same peripheral master. Additional peripheral masters can be added to the system to support multiple lines. More functionality can coexist in the same backplane by having some peripheral masters act as protocol converters or front-end security checking processors. A hot swap capable system can be deployed that allows faulted peripheral masters to be replaced without affecting the remaining boards in the operational system. Generous On-board and Expansion Board Feature Set In addition to its Pentium II processor mobile module, the ZT 5540 features 512K of L2 cache, up to 128 Mbytes of Error Correcting SDRAM (Synchronous DRAM) A type of dynamic RAM (DRAM) memory chip that has been widely used since the late 1990s. SDRAM chips eliminated wait states by dividing the chip into two cell blocks and interleaving data between them. , 4 Mbytes of Flash Memory, CompactFlash expansion, and a generous feature set of on-board I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output. I/O - Input/Output . This I/O includes 10/100 BASE-TX Ethernet, serial (2), parallel, USB USB in full Universal Serial Bus Type of serial bus that allows peripheral devices (disks, modems, printers, digitizers, data gloves, etc.) to be easily connected to a computer. (2), watchdog timer, and keyboard and mouse connections. Optional I/O expansion includes a Cardbus/PCMCIA interface, video, IDE drive, and PMC (1) See Portable Media Center. (2) (PCI Mezzanine Card) A PCI-based mezzanine card that is widely adapted to VMEbus, CompactPCI and PCI cards. card support. The ZT 5540 occupies a single 6U CompactPCI slot, and includes Ziatech's powerful industrial BIOS and solid-state flash disk support. The board can be configured with the user's choice of Windows NT, QNX A multiuser, multitasking, real time operating system for PCs from QNX Software Systems, Ltd., Ottawa, Ontario (www.qnx.com), that is noted for its low-memory requirement and rapid response. Similar to Unix, it has been in use since the early 1980s. , or VxWorks. Ziatech offers optional development toolkits that support the implementation of these operating systems on CompactPCI. Hot Swap Compliant The ZT 5540 supports CompactPCI products built to the hot swap standard recently adopted by the PCI Industrial Computer Manufacturers Group (PICMG An industry consortium that develops specifications for backplanes and interconnects for electronic equipment in the industrial and telecom fields. It was founded in 1994 as the PCI Industrial Computer Manufacturers Group, hence the acronym. ), the association that governs the CompactPCI specification. The ZT 5540 CPU Board joins Ziatech's family of Pentium, Pentium Pro and Pentium II CPU boards, and is designed to operate with Ziatech's complete line of CompactPCI products. This product line also includes scalable platform and peripheral products, operating system support, and pre-configured, fast track development systems. These modular CompactPCI computer products serve as the computing core for telecommunications, data communications, and industrial automation applications. Pricing and Availability The ZT 5540 Peripheral CPU Board with Pentium II Processor will be available for prototype design in December of 1998. The single quantity cost is $2,275, including a 266 MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. Pentium II and 64 Mbytes of ECC (1) (Error-Correcting Code) A type of memory that corrects errors on the fly. See ECC memory. (2) (Elliptic Curve Cryptography) A public key cryptography method that provides fast decryption and digital signature processing. SDRAM. Ziatech is an ISO (1) See ISO speed. (2) (International Organization for Standardization, Geneva, Switzerland, www.iso.ch) An organization that sets international standards, founded in 1946. The U.S. member body is ANSI. 9001-certified company that manufactures embedded computers based on two standards, the STD (Subscriber Trunk Dialing) Long distance dialing outside of the U.S. that does not require operator intervention. STD prefix codes are required and billing is based on call units, which are a fixed amount of money in the currency of that country. 32 Bus and CompactPCI bus. Ziatech created these standards, and offers the industry's most comprehensive product offerings of both STD 32 and CompactPCI. These embedded computer standards utilize Intel-type processors, run a variety of PC operating systems (MS-DOS MS-DOS in full Microsoft Disk Operating System Operating system for personal computers. MS-DOS was based on DOS, developed in 1980 by Seattle Computer Products. Microsoft Corp. bought the rights to DOS in 1981, and released MS-DOS with IBM's PC that year. , Windows NT, QNX, and VxWorks) and provide a reliable computing architecture for OEMs automating telecommunications, data communications and industrial automation applications. Ziatech partners with SCI (Scalable Coherent Interface) An IEEE standard for a high-speed bus that uses wire or fiber-optic cable. It can transfer data up to 1GBytes/sec. (hardware) SCI - 1. Scalable Coherent Interface. 2. UART. , the world's largest contract manufacturer of electronics, to manufacture its computer products. Headquartered in San Luis Obispo, on California's Central Coast, Ziatech operates a worldwide network of representatives and distributors, with sales offices throughout the United States, Europe and Asia. Ziatech was established in 1976. NOTE TO EDITORS: Photos for this and other Ziatech product releases may be obtained by contacting Phil Nash at 805/782-4500, Ext. 6036, or Phil_Nash@ziatech.com. On the Internet, visit the company at http://www.ziatech.com. |
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