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Xilinx Unveils Spartan II: Next Generation of Low Cost FPGAs as Programmable Replacements for ASICs and ASSPs.


Business Editors and High-Tech Writers

SAN JOSE San Jose, city, United States
San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850.
, Calif.--(BUSINESS WIRE)--Jan. 10, 2000

Feature-rich low cost Spartan(TM)-II

device delivers 100,000 system gates for less than $10(a)

Xilinx, Inc. (NASDAQ NASDAQ
 in full National Association of Securities Dealers Automated Quotations

U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on
:XLNX) today announced the Spartan-II family, the company's newest generation of FPGAs designed to be low cost programmable replacements for ASICs and application specific standard products (ASSPs). Spartan-II FPGAs set new standards for value in programmable logic See PLD. . The Spartan-II XC2S100 FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market.  with 100,000 system gates, for example, will list for less than $10(a) in high volumes. The new features in the Spartan-II family are now able to address a larger range of high-volume applications, and by replacing ASSPs, open up a vast new market for programmable logic.

"Replay Networks uses Spartan-XL FPGAs in its products because of the value they bring to the system as well as their capability to be reprogrammed in the field," said Dan Levin, vice-president of engineering, Replay Networks. "Replay is pleased to have produced the first consumer product capable of being upgraded in the user's home, and the Spartan Series products from Xilinx are fully capable of supporting this feature. We are looking forward to using the new Spartan-II FPGAs in the future and taking advantage of the higher density, performance, and larger feature set."

The Spartan-II family offers some of the most advanced FPGA technologies available today, including programmable support for multiple I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output.

I/O - Input/Output
 standards (including 5V tolerance), on-chip block RAM and digital delay lock loops for both chip-level and board-level clock management. Spartan-II devices can now replace complex ASSP (Application Specific Standard Part) An ASIC chip that is designed as a generic device for a particular market. Whereas an ASIC is typically used only by its creator, ASSPs are used by many different companies in the design of their products. See ASIC.  functions such as a MIPS-PCI bridge, Viterbi-Reed Solomon decoders, and quad data rate Quad data rate (or quad pumping) is a communication signalling technique wherein data is transmitted at both the rising and falling edges of the clock signal, much the same way DDR technology works, but with two clock signals 90° out of phase from each other, effectively  RAM (QDR QDR Quadrennial Defense Review (US DoD)
QDR Quad Data Rate (Memory Technology)
QDR Quality Deficiency Report
QDR Quality, Durability and Reliability (Toyota Motor Company) 
) memory controllers. In these applications, the use of efficient IP allows the Spartan-II FPGA to be more economical than the currently available ASSP solutions. In addition, the features of the Spartan-II devices provide superior value by eliminating the need for many simple ASSPs such as phase lock loops, FIFOs, I/O translators and system bus drivers that in the past have been necessary to complete a system design.

Operating at 2.5 volts and featuring a unique power down mode, the features in the Spartan-II FPGAs allow them to address a wider range of cost sensitive products such as telephone handsets, laptop PCs, personal digital assistants (PDAs) and other high volume consumer electronics applications such as PC add-on cards, digital modems, DVD players, portable audio (such as MP3), on-demand TV recorders and set-top boxes.

"Programmable logic exceeded gate arrays in revenue for the first time ever in 1999. We believe our new Spartan-II FPGAs will only accelerate that momentum," said Wim Roelandts, Xilinx president and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. . "Advanced manufacturing processes have allowed us to create a product line that provides 100,000 system gates for less than $10(a). We now have features that allow us to address the vast ASSP market, estimated at over $20 billion(b), further fueling programmable logic's growth."

                The Spartan-II FPGA Family at a glance

Part            Logic                       Max       Block
Number          Cells     System Gates      I/O      RAM bits

XC2S15            432       15,000           82       16,384
XC2S30            972       30,000          128       24,576
XC2S50          1,728       50,000          176       32,768
XC2S100         2,700      100,000          196       40,960
XC2S150         3,888      150,000          260       49,152


Spartan-II FPGAs are produced on an advanced 0.18 micron, six-layer metal process. The new family consists of five devices ranging in density from 15,000 to 150,000 system gates, tripling the density of earlier 3.3-volt Spartan-XL and 5-volt Spartan offerings. Samples of the 150,000 system gate Spartan-II XC2S150 device are available now. All five models of the new Spartan-II family of devices are expected to be in full production within the current quarter.

A number of verified and tested cores, including the popular 32-bit, 33 MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc.  and 64-bit, 33 MHz Xilinx PCI (1) (Payment Card Industry) See PCI DSS.

(2) (Peripheral Component Interconnect) The most widely used I/O bus (peripheral bus).
 LogiCORE solutions, are available now for the Spartan-II FPGAs. In addition, a wide variety of over 50 cores from third-party Xilinx AllianceCORE partners are also available now for Spartan-II FPGAs.

The current Xilinx Alliance Series(TM) and Foundation Series(TM) software, version 2.1i, fully support all the new Spartan-II products, as do design-entry tools from leading third-party EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board.  vendors such as Exemplar, Cadence, Mentor, Model Technology, Synopsys and Synplicity.

In benchmarks performed using Xilinx 2.1i software targeting a 100,000 gate Spartan-II device versus the leading competitor's closest size device and latest software, Xilinx 2.1i software compiled designs in minutes, twice as fast as the competition. Timing driven results with 2.1i delivered an average 18% increase in performance. The competition delivered no performance increase.

Xilinx Foundation v2.1i delivers a low cost, shrink-wrapped design environment for the Spartan-II Family at a cost of $495.00. Xilinx software now makes replacing ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor.  technology a pushbutton push·but·ton  
n. also push button
A small button that activates an electric circuit when pushed.

adj. also push-but·ton
Equipped with or operated by a pushbutton.
 process. With 2.1i software the FPGA design flow allows a designer to maintain control of the design, reach timing closure faster and use new debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits.  tools currently unavailable in an ASIC design flow.

Xilinx is the leading innovator of complete programmable logic solutions, including advanced integrated circuits, software design tools, predefined system functions delivered as cores, and unparalleled field engineering support. Founded in 1984 and headquartered in San Jose, Calif., Xilinx invented the field programmable gate array See FPGA.  (FPGA) and fulfills more than half of the world demand for these devices today. Xilinx solutions enable customers to reduce significantly the time required to develop products for the computer, peripheral, telecommunications, networking, industrial control, instrumentation, high-reliability/military, and consumer markets. For more information, visit the Xilinx web site at www.xilinx.com.

(a) Based upon volume projections of 250k units, -5 speed, TQ144 package. (b) Source: Dataquest Worldwide ASIC/SLI Forecast for CY 1999, published Spring 1999.

Note to Editors: Other brands or product names are trademarks or registered trademarks of their respective owners.
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Date:Jan 10, 2000
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