Waferscale Introduces Two-Chip, 256Kbyte Flash Solution for 8051 and 68Hc11 Systems; EasyFLASH ICs Eliminate Obstacles to ISP Posed By 8-bit CISC MCUs.

FREMONT, Calif.--(BUSINESS WIRE)--July 12 1999--

Waferscale (WSI) today introduced three new EasyFLASH MCU support ICs that provide 256 Kbytes of 100% in-system-programmable (ISP) flash memory and 3,000 gates of programmable logic to 8-bit CISC microcontrollers, such as Intel's (Nasdaq:INTC) 8051 and Motorola's (NYSE:MOT) 68HC11.

The new PSD8X4F MCU support ICs have twice the flash memory available on WSI's next largest ISP flash PSD.

Support LUT Implementations of Complex Controller Algorithms - The 256 Kbyte PSD8X4F devices are ideal for 8051 or 68HC11-based systems that use complex controller algorithms, such as those used in automotive power train or transmission control, traction control, GPS and other navigation systems, industrial process control or medical equipment. The on-chip 256 Kbyte flash memory is also large enough to accommodate firmware written in high-level languages or systems with real-time operating systems.

According to David Raun, Waferscale's vice president of marketing, "Eight-bit CISC MCUs are the embedded control work horses. They are inexpensive, reliable and well-understood. However, they don't have the processing power to handle complex control algorithms. Designers frequently solve this problem by creating large look-up tables and filling them up with pre-calculated values that the MCU can retrieve in response to real-time events. Using in-system programmability of flash, the data can be updated as necessary. This relieves the microcontroller of the burden of slogging through real-time calculations, but it also requires an enormous amount of flash memory.

"Unfortunately, 8-bit MCUs don't offer big flash memories. The 8051 MCUs rarely have more than 8Kbytes and 68HC11s don't have any. External flash is mandatory to implement these look up table implementations," Raun explained. "The PSD8X4F is the obvious solution for these designs because it is architected specifically to support 8-bit CISC microcontrollers. It has all the extra logic, latches and I/O and a programmable MCU interface that would otherwise have to be added as discrete devices that increase board space and power consumption. The PSD8X4's on-chip CPLD includes a built-in connection to the MCU address/data bus, a feature that is unavailable on any other programmable logic device.

"More importantly, the PSD814F makes it really easy to have in-system programmable 8051 or 68HC11 systems. These MCUs' architectures prevent them from writing to program space which means that adding flash to these systems will not automatically result in in-system programmability. Complex firmware routines must be written that re-classify the MCU address space before these microcontrollers will program their external flash. The PSD8X4F devices completely eliminate this obstacle by providing a special ISP decode PLD that automatically handles address reclassification during MCU-controlled ISP. The PSD8X4F is the only 256 Kbyte external flash solution that automates ISP in 8-bit CISC MCUs systems.

JTAG Programming Interface - Both the logic and flash memory on PSD8X4F devices are JTAG-programmable, using a four- or six-pin, on-chip, JTAG port that allows true first-time programmability in the system. Although virtually all CPLD vendors offer a JTAG programming interface, Waferscale offers the world's only flash NVM devices with a JTAG programming interface.

Although most flash devices are considered to be in-system programmable, they generally CANNOT be programmed in the system the first time because the MCU needs access to the programming code for execution. Blank memories don't have any code, so first time ISP can be achieved only if the MCU has a boot block memory or if the flash device has a connection to the outside world, such as a serial port or the JTAG interface on PSD8X4F devices. Using the serial port for ISP is exceptionally slow, requiring 150 seconds per megabyte. As a result most ISP flash memories are programmed the first time using a standard bed-of-nails EPROM programmer, which results in bent pins and adds weeks to the manufacturing cycle..

The JTAG interface on PSD8X4F EasyFLASH allows true first-time ISP using a tester or a PC and Waferscale's low-cost FlashLINK(TM) programmer. It allows chaining with other JTAG devices, like other CPLDs, so all the ISP can be done at once. The EasyFLASH JTAG interface is the world's only flash solution that offers a true first-time ISP capability.

Faster Serial ISP - The PSD8X4F's JTAG interface includes several features that speed up serial programming via the JTAG port. These include:

Embedded State Machine that constantly polls the memory

cells. When it verifies that a cell has been programmed, it

sends a signal to the tester or PC to move to the next memory

cell - eliminating any time wasted waiting for unnecessary

programming pulses.

Address Incrementing - Rather than loading a 17-bit address

plus 8-bits of data for every single memory address, the

programming algorithm increments each address after the first

one so that it only loads the 8-bits of data for all

subsequent memory addresses. This effectively reduces the

time required by 2/3

Two-stage Memory Pipe-lining loads the next byte, while the

previous byte is being programmed to additionally increase

the programming speed.

MicroCell(TM) CPLD - The CPLD on the PSD8X4F has 24 input and 16 output microcontroller macrocells, or MicroCells, that provide a direct bus connection between the microcontroller address/data bus and the PLD flip-flops. This connection eliminates the need to go through the PLD array, saving the equivalent of 1,200 gates of logic usually required to establish the MCU-to-logic connection. The PSD8X4F CPLD can implement complex peripheral functions including dual processor interfaces, mail boxes, keypad scanners, timers, counters, interrupt controllers, shift registers and others.

Variety of Memory Options - PSD8X4F devices are available with various combinations of SRAM and flash memory, as follows:

-0-

              Flash      2nd Flash     CPLD           Prog. MCU   JTAG
  Device       NVM         Array      Gates   SRAM    Interface   Port
-------------------------------------------  -------------------------
PSD814F2    256 Kbytes   32 Kbytes    3,000  2 Kbytes    yes       yes
PSD804F2    256 Kbytes   32 Kbytes    3,000              yes       yes
PSD814F3    256 Kbytes                3,000  2 Kbytes    yes       yes


     Concurrent ISP Option - Two of the devices, the PSD8X4F2 and the
PSD804F2 include a second 32 Kbyte flash memory array. The second NVM
array allows concurrent MCU-controlled ISP either flash memory array
without affecting system operation.

     Pricing and Availability - PSD8X4F devices are available and are
priced as follows, in quantities of 10,000 units:

             Flash     2nd Flash   CPLD                       Price
  Device     NVM         Array    Gates       SRAM  (USD)
-------------------------------------------   ------------------------
PSD8X4F2  256 Kbytes  32 Kbytes   3,000      2 Kbytes        $ 7.59
PSD804F2  256 Kbytes  32 Kbytes   3,000                      $ 6.97
PSD8X4F3  256 Kbytes              3,000      2 Kbytes        $ 6.92

Waferscale Integration, Inc is the leading supplier of highly integrated programmable solutions for high-speed embedded control designs. Its PSD families of single-chip, field-programmable microcontroller peripherals off-load microcontroller functions so that MCUs can operate faster and do more. The power-conserving features of PSD devices can extend system battery life by several hours. The company's family of high performance non-volatile memory products offers densities of 16 Kbit to 1 Megabit with access times as low as 25 ns and 3.3 volt devices with access times as low as 70 ns. Waferscale is located in Fremont, California.

Note to Editors: PSDsoft, EasyFLASH and FlashLINK are trademark of Waferscale Integration, Inc.