Waferscale Integration PSD4000 Series Offers High-Density Concurrent Flash and Programmable Logic for 16- & 32-Bit MCUs and DSPs.

Business Editors & High-tech Writers

FREMONT, Calif.--(BUSINESS WIRE)--April 17, 2000

First Devices Offer 4.25 Mbits of "ISP & IAP" Flash, 64Kbit of

SRAM, and 3K Gate CPLD

Waferscale Integration introduced today a new family of ultra low-power Programmable System Devices (PSDs) that provide 100% in-system programmable concurrent flash memory, SRAM, programmable logic, and extra I/O for 16- and 32-Bit microcontrollers from major vendors, such as Motorola, Intel, Hitachi, Infineon, and Philips, as well as DSPs from Texas Instruments and Analog Devices.

Many of these 16-bit controllers have no flash memory and those that do are limited to 128 KBytes. (See table at end of release.)

Two devices are being introduced today, the PSD4135G2 and the PSD4235G2. Both devices have 512 KBytes of flash, a second concurrent 32 KByte Flash Array, 8 KBytes of SRAM, a built-in configurable interface for 16-bit and 32-bit MCUs or DSPs, a programmable address decoder, and a small CPLD for chip selects, combinatorial logic and configurable pin-assignments. PSD4000 devices also have an ISP JTAG port that allows production-line in-system programming (ISP) in less than 20 seconds per device. The PSD4235G2 also has additional sequential logic in a 3,000 gate general purpose CPLD. With 82 inputs and 24 outputs, the CPLD provides enough on-chip programmable logic to implement peripheral functions, such as shift registers, mail boxes, and serial channels. The PSD4235G2 also allows JTAG chaining during in-system programming.

New PSD4000 Series devices will be added later this year and in 2001 that expand the flash memory to 8- and 16-Mbits, and increase the SRAM to 256-Kbits and 1-Megabit.

Fastest In-system Programming (ISP) Solution on the Market -- An ISP JTAG port on PSD4000 devices can be used to program the entire device including memory, CPLD, and configuration logic in as little as 20 seconds, using Waferscale's low cost FlashLINK(TM) programmer. Other solutions including single chip MCUs and convention flash memories require boot code in the system to perform the programming sequence. The boot code has to be programmed into the memory using a standard EPROM programmer or is available as a fixed ROM bootstrap loader on the MCU. The fixed ROM bootstrap loader cannot be customized for the end-application and cannot run the application. Once the boot code is in the system, most flash memories are programmed using a UART interface which can take several minutes for programming. The PSD4000's ISP JTAG port lets designers modify, load and test code almost immediately. As a result, design iterations can take place much more quickly with PSD4000 devices.

In the production environment, several minutes programming time is not acceptable, so single-chip controllers and most flash memories are usually pre-programmed on standard EPROM programmers. In contrast, a blank PSD4000 Series device can be soldered to the board, and entirely programmed within 20 seconds on the production line, saving time and money. This method can save at least $2 in manufacturing costs and allows orders to be turned around more quickly.

IAP Feature Supports Embedded Control Applications That Require Remote Data and Code Updates -- PSD4000 devices are ideal for any high-performance embedded control systems that have large code and data storage requirements, such as controllers for voice processing, high capacity tape drives, fiber-optic lasers, and framer/router background controllers. PSD4000 devices are "in-application programmable" (IAP) meaning they can be re-programmed remotely in the field without affecting system operation. This IAP feature makes them particularly useful for systems that require code and/or data updates in the field. Examples of such applications are global positioning systems, automotive control systems, and medical instrumentation.

For example, GPS systems frequently need to update current satellite coordinates and user defined way points. They must also download updated maps or an updated application over a communication channel (modem or UART). In order to accept the updated information, the processor will have to perform an erase/write of the flash memory while it is operating. This is called in-application programming (IAP) because the system is re-programming the flash memory while it is concurrently running the application. If the system has only a single conventional flash memory, IAP is not possible because the processor will erase its own programming algorithms from memory and, therefore, will not be able to complete the update. Therefore, a second memory (flash, ROM, EPROM) is required to store the processor instructions during in-application programming. PSD4000 devices include a second 32-KByte flash memory array for the boot and flash programming algorithms, so the processor can execute instructions from either of the PSD4000's flash memory arrays while updating the other one.

According to David Raun, Waferscale's vice president of marketing, "Most 16-bit and 32-bit MCUs plus DSPs do not have any on-chip flash memory. The ones that do have limited densities and tend to be expensive, costing as much as $50. The four-megabits of flash on just the first member of the PSD4000 Series is four times larger than that offered by most single-chip controllers. Neither MCUs nor DSPs have any on-chip programmable logic to support complex address decoding or chip selects.

"On the other hand, the memory requirements for these are skyrocketing. These systems tend to be more complex with much larger code sizes. Their firmware is written in C or C++ and they frequently include an OS kernel. These factors rapidly increase the need for more and more flash memory.

"What's more, the complex control systems in which 16-bit processors are used frequently need to store large amounts of data that must be updated constantly. For example medical instrumentation collects, analyzes and stores data on a patient's vital signs. Since the data can change every few seconds, the flash memory must be updated frequently over a long period of time. Another example is automotive control, in which factory-loaded programs and data tables must be updated and adjusted constantly in response to real-time events, such as gasoline quality, road conditions, or engine wear. In addition, all fault codes must be logged as they occur for use by mechanics when they do diagnostics.

"These types of systems must continually update an enormous quantity of data. This means they must have the ability to be programmed while they are executing the application (in-application programming). The act of updating the flash results in the erasure of the application code, making it impossible to complete the update. The only way to get around this dilemma is to have a second memory from which the microcontroller can execute code during the flash update. Until now this has meant that systems have had to have two external flash memory chips, plus a CPLD to manage address decoding. Building the interface and address decoding logic for the external flash has been a time consuming process. All the extra chips ratchet up the power consumption.

"The PSD4000 solves these problems by providing dual flash memory arrays, dedicated programmable address decoding logic, and software algorithms for a complete turnkey solution for in application programming. With the PSD4000, designers can add high densities of 100% in-system programmable flash almost effortlessly," Raun concluded.

EDA Tools Completely Automate Logic Design -- Waferscale's PSDsoft Express EDA tool automatically generates the HDL for the MCU/DSP interface, address decoding, paging, segmentation, chip selects and pin assignments for PSD4000 devices. The designer simply selects options from point-and-click dialog boxes and the tool automatically and transparently generates syntactically correct AHDL. PSDsoft Express is free of charge and can be downloaded from Waferscale's Web site, www.waferscale.com.

For designers who want to use the PSD4235G2 general purpose CPLD to design custom peripherals with sequential logic, such as interprocessor hand shakes, shift registers or mail boxes, Waferscale provides its PSDsoft 2000 EDA tool. PSDsoft 2000 uses Waferscale's own version of MINC's ABEL 6.2 for PLD design and logic optimization. Designs may be entered using Boolean equations, truth tables, state diagrams, or any combination of these.

Both PSDsoft Express and PSDsoft 2000 automatically merge the MCU application code with PSD4000 logic design, maps them into the target PSD4000 device, and verifies that there are no memory address conflicts. Using any other form of external flash memory, this address verification must be done manually.

The PSDsoft EDA tools also automatically generate C-code functions for the flash erase/write algorithms, I/O control and definition, memory management, and power management that are, specific to that design. The C-code can then be cross compiled and linked with any other MCU firmware for execution. This is a hands-off process that takes only a couple of seconds. It saves much design time and prevents any errors that might occur during a manual procedure.

Pricing and Availability -- The first two members of the PSD4000 Series, PSD4135G2 and PSD4235G2, both with a 512 KByte primary flash array, 32 KByte secondary flash array, 8 KBytes of SRAM, ISP JTAG port, and configurable DSP or MCU interface, are available now in an 80 pin TQFP package. Prices for the PSD4135G2 (with 1,000 gates of logic) start at $8.35 in quantities of 10,000. Prices for the PSD4235G2 (with 3000 gates of logic) start at $9.75. Availability for other PSD4000 Series members are as follows:

           Primary         Second      CPLD
Device     Flash Memory    Flash       (gates)   SRAM     Availability
                           Memory

PSD4135G2  512 KBytes      32 KBytes   1,000     8 KBytes    NOW
PSD4235G2  512 KBytes      32 KBytes   3,000     8 KBytes    NOW
PSD4156G2  1 Megabyte      32 KBytes   1,000     32 KBytes   Q4 2000
PSD4256G2  1 Megabyte      32 KBytes   3,000     32 KBytes   Q4 2000
PSD4177G7  2 Megabyte      64 KBytes   1,000     128 KBytes  2H 2001
PSD4277G7  2 Megabyte      64 KBytes   3,000     128 KBytes  2H 2001

PSDsoft is available now for free from Waferscale's web site, www.waferscale.com. A complete development kit including the FlashLINK Programmer and Development Board is available for $99.

Waferscale's World Wide Web site is www.waferscale.com.

Waferscale Integration, Inc. is the leading supplier of highly integrated programmable solutions for high-speed embedded control designs. Its PSD families of single-chip, field-programmable microntroller peripherals off-load microcontroller functions so that MCUs can operate faster and do more. The power-conserving features of PSD devices can extend system battery life by several hours. The company's family of high performance, non-volatile memory products offers densities of 16 Kbit to 1 Megabit with access times as low as 25 ns and 3.3 volt devices with access times as low as 70 ns. Waferscale is located in Fremont, California.

Note to Editors: PSDsoft, EasyFLASH and FlashLINK are trademarks of Waferscale Integration, Inc. Windows is a registered trademark of Microsoft Corporation. ABEL is a registered trademark of MINC.