Waferscale's Low-Cost 8051 Development Kit Enables Quick Prototyping and Debugging of 8051 Systems.FREMONT, Calif.--(BUSINESS WIRE)--June 15, 1999-- Waferscale Integration, Incorporated (WSI See wafer scale integration. ) today introduced a comprehensive prototyping and debugging environment for designers of 8051 MCU-based systems with external memory and logic provided by the company's EasyFLASH(TM) PSD (tool) PSD - Portable Scheme Debugger. 813F, PSD3XX and PSD211R MCU (1) (MicroController Unit) A computer on a single chip. See microcontroller. (2) (Multipoint Control Unit) A device that is used to moderate a videoconference of three or more end points (users at computers or groups of users support ICs. The EasyFLASH-51(TM) development environment accelerates system development by allowing designers to quickly prototype and debug complete embedded systems designs, including the MCU code, the PSD's external logic and memory, external peripherals, memory mapping, and ISP (1) See in-system programmable. (2) (Internet Service Provider) An organization that provides access to the Internet. Connection to the user is provided via dial-up, ISDN, cable, DSL and T1/T3 lines. capabilities. The only other way to prototype 8051 designs with external peripherals is to build a printed circuit board. According to David Raun, Waferscale's vice president of marketing, "The EasyFLASH-51 development environment is a cost effective means of prototyping 8051 designs. This is extremely important in situations where the MCU code has outgrown the memory on a single-chip MCU or where the design needs external decode or control logic. Debugging systems with external devices is problematic. "The use of high-level languages, the implementation of product features in firmware or the inclusion of an OS kernel can cause the firmware to outgrow the limited amount of non-volatile memory on a single-chip 8051. When this happens the designer has to use an external memory. If he needs to build a customized peripheral such as a shift register or a dual processor handshake, he will need to add external programmable logic as well," Raun explained. "This is where the PSDs comes in. Single-chip PSDs provide designers with various combinations of programmable logic, non-volatile memory and SRAM See static RAM. SRAM - static random-access memory that are very easy to use with the 8051 architecture. PSDs have a programmable interface to the 8051 that takes a few seconds to configure. PSDs expand the allowable program space of 8051 MCUs from 64 Kbytes to 128 Kbytes. The in-system programmable flash PSDs also have a special ISP decoding PLD (Programmable Logic Device) Refers to a variety of logic chips that are programmable at the customer's site, the customer being the vendor of the finished chip, not the end user. . The ISP decoding PLD solves the problems that occur during in-system programming because the 8051 architecture won't allow writes to program space. Since the PSD's on-chip CPLD (Complex PLD) A programmable logic device that is made up of several simple PLDs (SPLDs) with a programmable switching matrix in between the logic blocks. CPLDs typically use EEPROM, flash memory or SRAM to hold the logic design interconnections. See PLD and SPLD. is directly connected to the MCU address/data bus, it conserves product terms for the implementation of system logic, rather than wasting it on the MCU interface. In short, PSDs are ideal for expanding 8051 systems. "However," Raun explained, "until now, there has been no easy way to debug these designs. An ICE can be used to develop and debug the MCU code, but the only way to see how the external logic and memory work with the firmware has been to build a custom printed circuit board -- a process that extends the development cycle by several weeks. "Waferscale's EasyFLASH-51 development environment completely solves this problem by providing two printed circuit boards that include the core MCU, the PSD of the designer's choice, and an array of development tools. A design developed in this environment will have the exact same combination of flash, EEPROM (Electrically Erasable Programmable ROM) A rewritable memory chip that holds its content without power. Although EEPROMs spawned flash memory, EEPROMs are byte addressable at the write level, whereas flash chips must erase a block of bytes before rewriting. or EPROM EPROM in full erasable programmable read-only memory Form of computer memory that does not lose its content when the power supply is cut off and that can be erased and reused. , SRAM, I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output. I/O - Input/Output , programmable logic and other external devices that the designer has selected for the final design. "As far as we know, Waferscale is the only vendor offering a development system that supports the use of external memory, logic and other external devices with the 8051 microcontroller," Raun said. EasyFLASH-51 Development Kit Configuration. The EasyFLASH-51 development kit consists of an MCU mother board (8051 MCU included), a PSD daughter board (PSD813F1 included), a Keil C-51 8051 compiler, Waferscale's PSDsoft(TM) 5.0 EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. software, and Waferscale's FlashLINK(TM) cable for in-system programming via the PSD's JTAG (Joint Test Action Group) An IEEE standard for boundary scan technology. See scan technology. JTAG - Joint Test Action Group interface. MCU Mother Board. The EasyFLASH-51 mother board includes an 8051 MCU with two timer/counters and 128 bytes of RAM; an 8-bit asynchronous Refers to events that are not synchronized, or coordinated, in time. The following are considered asynchronous operations. The interval between transmitting A and B is not the same as between B and C. The ability to initiate a transmission at either end. UART (Universal Asynchronous Receiver Transmitter) The electronic circuit that makes up the serial port. Also known as "universal serial asynchronous receiver transmitter" (USART), it converts parallel bytes from the CPU into serial bits for transmission, and vice ; a 9-pin RS232 interface; a four position dip switch to set the execution code source (flash, EEPROM or SRAM); a debug RAM for break point capability; a 2.4 inch by 2.5 inch prototype area that is connected to the MCU's address/data bus and control signals; expansion slots to expand the prototype area; a reset switch; and a 2 x 16 LCD display that echos serial commands during debug and annunciates the results of ongoing tests (e.g. page register, ok, RAM, ok, etc.). The prototype area can be used to add external devices that will be included in the system, such as a DAC See D/A converter and discretionary access control. DAC - Digital to Analog Converter or ADC (1) See A/D converter. (2) (Apple Display Connector) A peripheral connector from Apple that combines digital video display, USB and power in one cable. . The expansion slots allow the addition of additional prototype boards. The EasyFLASH-51 mother board provides three power supply options: a holder for a 9-Volt battery for prototyping portable applications, a standard transformer, or an external power supply to allow JTAG chaining or to accommodate user expansion. A Choice of PSD Daughter Boards - The EasyFLASH-51 Development Kit includes a PSD813F daughter board populated with a 100% in-system programmable PSD813F1. Any of the eleven available flash PSD813F derivatives can be plugged into the daughter board socket to exactly represent the configuration of the design. A second, optional daughter board is available that supports Waferscale's PSD3XX and PSD211R devices. All daughter boards provide a jumper (JP1) to measure PSD current consumption. Current consumption is measured by placing a resistor in series with the PSD and then measuring the voltage drop across the resistor. JTAG connectors on the PSD813F daughter board provide access to the PSD813F's JTAG interface for JTAG programming of the PLD, MCU interface configuration, flash and boot memories. During ISP, JTAG traffic can be observed via LEDs mounted on the daughter board. PSDsoft(TM) 5.0 EDA Tool Suite - PSDsoft 5.0 supports HDL-based logic design of the 3,000 gate on-chip CLPD, using MINC's AHDL AHDL - Analog Hardware Design Language . MCU interface configuration, I/O control, memory mapping, and the configuration of programmable functions are handled quickly using radio buttons on pull-down menus and dialog boxes. PSDsoft automatically generates C-routines for the implementation of MCU-controlled in-system-programmability and ensures there is no conflict between the addresses assigned to the logic and microcontroller firmware. Without PSDsoft, designers must manually verify there is no address overlap, a difficult and time-consuming process. PSDsoft 5.0 runs under Windows(R) 95/98/NT. Keil C51 Compiler - Keil's third-party C51 compiler achieves compiled C-code efficiency and execution speed that are comparable to assembly language implementations. C51 provides designers with full access to all resources on the 8051 microcontroller, including the 8051 register banks. Version 5 of the C51 C Compiler supports enhanced long arithmetic, enhanced floating-point arithmetic, performs extensive syntax checking, and provides extensive error messages with three warning levels. The compiler also supports virtually unlimited program size, making it ideal for use with PSDs that have as much as 256 Kbytes of program memory. The compiler offers complete symbol and type information for source-level debugging, use of AJMP AJMP African Journal of Medical Practice (Nairobi, Kenya) and ACALL instructions, bit addressable data objects, and a built-in interface for the RTX RTX Russian Traded Index RTX Resiniferatoxin RTX Royal Trux (band) RTX Real Time Executive RTX Re-Transmission RTX Request Retransmission RTX Report Time Crossing (FAA) 51 real-time operating system (operating system) Real-Time Operating System - (RTOS) Any operating system where interrupts are guaranteed to be handled within a certain specified maximum time, thereby making it suitable for control of hardware in embedded systems and other time-critical applications. . FlashLink ISP Programmer - Waferscale's FlashLINK cable allows designers to quickly perform first-time and subsequent in-system programming of PSD813F devices (via a JTAG interface), either in the EasyFLASH-51 development environment or in the target system. The compact FlashLINK programmer connects to the parallel port of a PC or laptop computer. Test Routines Included - Waferscale provides several software routines to test the development board hardware, for code copy tests, and to test the UART. The code copy test is used to tests the ISP memory swapping capabilities of the PSD813F device. This is important because 8051 microcontrollers cannot write to program space, so memory swapping must be implemented in order to effect MCU-controlled ISP. Price and Availability - Waferscale's EasyFLASH-51 development kit is available now and costs $399 total for the mother board with 8051 MCU, daughter board with PSD813F1, PSDsoft 5.0 EDA tools, Keil C-51 compiler, and Waferscale's FlashLINK programmer. A second optional daughter board for use with PSD3XX and PSD211R devices is available for an additional $65. Waferscale will be introducing additional mother boards to support other MCU architectures and daughter boards to support the full complement of PSD architectures in the near future. Waferscale's World Wide Web site is www.waferscale.com. Waferscale Integration, Incorporated is the leading supplier of highly integrated programmable solutions for high-speed embedded control designs. Its PSD families of single-chip, field-programmable microcontroller peripherals off-load microcontroller functions so that MCUs can operate faster and do more. The power-conserving features of PSD devices can extend system battery life by several hours. The company's family of high performance non-volatile memory products offers densities of 16 Kbit to 1 Megabit with access times as low as 25 ns and 3.3 volt devices with access times as low as 70 ns. Waferscale is located in Fremont, California. EasyFLASH-51, PSDsoft, EasyFLASH and FlashLink are trademarks of Waferscale. Windows is a registered trademark of Microsoft Corporation. ABEL Abel, son of Adam and Eve, in the Bible Abel, in the Bible, son of Adam and Eve, a shepherd, killed by his older brother, Cain; in the Gospel of St. Matthew, mentioned as the first martyr. is a registered trademark of MINC MINC Multilingual Internet Names Consortium MINC Multicast-based Inference of Network-internal Characteristics MINC Military-Industrial Complex MINC Management Interactive Network Connection (USDA) . |
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