Vitesse Continues V-Frame 2.5 Family; 2.5Gb/s SONET/SDH Framer With Section & Line Termination and 16-bit Transceiver With Clock Generation IC.CAMARILLO, Calif.--(BUSINESS WIRE)--March 23, 1999--Vitesse Semiconductor Corp. (Nasdaq:VTSS VTSS Vehicle Theft Security System VTSS Vancouver Technical Secondary School ) Tuesday announced the second group of products in the V-FRAME 2.5 family of products. The V-FRAME 2.5/SLT includes full SONET/SDH section and line termination, including byte interleaving interleaving - sector interleave and de-interleaving functions, and multiplexing and demultiplexing functions that are required to implement a 2.5Gb/s channelized Refers to an architecture that transmits data in channels. It often refers to the 64 Kbps channels in T1 lines, which were originally developed to handle digitized voice streams (TDM). See TDM. SONET/SDH interface for ATM, Packet Over SONET A metropolitan area network (MAN) or wide area network (WAN) transport technology that carries IP packets directly over SONET transmission without any data link facility such as ATM in between. (POS (1) See point of sale and packet over SONET. (2) "Parent over shoulder." See digispeak. POS - point of sale ) and SONET/SDH transmission equipment. The chipset includes the VSC VSC Vehicle Stability Control VSC Vermont State Colleges (Waterbury, Vermont) VSC Vessel Safety Check (USCG Auxilliary) VSC Vehicle Skid Control VSC Vermont Service Center 9111, a SONET/SDH section/line terminator and the VSC8140, the industry's first 16-bit transceiver IC with integrated clock generation capabilities. This chipset makes 2.5Gb/s a practical alternative to today's slower system interfaces by dramatically reducing the cost, power, board space and development time required by 2.5Gb/s SONET/SDH equipment manufacturers. The framer in this V-FRAME 2.5/SLT chipset is the VSC9111, a 2.5Gb/s transport overhead terminating transceiver, and its companion chip, the VSC8140, is a 16-bit 2.5Gb/s transceiver with integrated clock multiplication unit (CMU CMU - Carnegie Mellon University ). This 3.3 IC chipset continues Vitesse's directive of providing complete 2.5Gb/s physical layers (PHYs) solutions for ATM, POS and SONET/SDH. VSC9111 The VSC9111 completes a concatenated STS-48c/STM-16c and/or STS-48/STM-16 link to either four STS-12/STM-4 data streams or 16 STS-3/STM-1 data streams. The integrated industry-standard five line JTAG (Joint Test Action Group) An IEEE standard for boundary scan technology. See scan technology. JTAG - Joint Test Action Group boundary scan conforms to IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields. 1149.1 standards and provides the user with full board level testability. The device terminates SONET/SDH section and line overhead. A built-in FIFO (First In First Out) A storage method that retrieves the item stored for the longest time. Contrast with LIFO. See traffic engineering methods. FIFO - first-in first-out on the drop side provides clock synchronization and buffering between this device and industry standard ATM/POS UNI devices. The VSC9111 features a unique bit error rate monitor, along with section and line loopback modes and transport overhead monitoring. This provides an ideal solution for wavelength division multiplexing See WDM. (communications) wavelength division multiplexing - (WDM) Multiplexing several Optical Carrier n signals on a single optical fibre by using different wavelengths (colours) of laser light to carry different signals. (WDM) monitoring applications. For tester applications, the VSC9111 contains two 16x16 crosspoint switches, providing the user the ability to crossconnect (and duplicate) single STS-12/STM-4 input to the other three channels or STS-3/STM-1 to the other 15 channels for both transmit and receive directions. The crosspoint switches can also be used as a Time Slot Interchange (TSI) fabric with STS-3/STM-1 level granularity in add/drop mux system applications. It also contains a flexible error insertion capability to assist the test equipment designer. The 8-bit CPU CPU in full central processing unit Principal component of a digital computer, composed of a control unit, an instruction-decoding unit, and an arithmetic-logic unit. interface of the VSC9111 provides for device configuration, statistics, performance monitoring, diagnostic functions and test mode operation. The Section and Line termination and generation functions are performed within the VSC9111, allowing easy system design and reduction in board space requirements. The VSC9111 incorporates full overhead access through parallel ports for overhead insertion and extraction. "The VSC9111 provides an astounding a·stound tr.v. a·stound·ed, a·stound·ing, a·stounds To astonish and bewilder. See Synonyms at surprise. [From Middle English astoned, past participle of astonen, increase in features and functionality over any existing competitive product at a combined lower power, providing the system designer with enormous flexibility in their systems," stated Barry Sandefur, Vitesse's vice president, advanced networking products. "In providing a total solution, Vitesse provides full reference design information for the system designer that includes the VSC8140, shortening time to market for our system customers," continued Sandefur. VSC8140 The VSC8140 implements the serialization se·ri·al·ize tr.v. se·ri·al·ized, se·ri·al·iz·ing, se·ri·al·iz·es To write or publish in serial form. se , deserialization and clock generation functions for OC-48/STM-16 SONET/SDH systems. The 16-bit parallel interface supports parity checking at the transmit and receive interfaces and mates seamlessly with the VSC9111. "Time to market is extremely important for our customers," stated Simon Keeton, telecom product marketing engineer. "By ensuring complete interoperability with our family of framers, the VSC8140 simplifies system design and reduces design time, allowing our customers to get their products to the market faster," continued Keeton. Another advantage of the VSC8140 is the high speed 2.5Gb/s output clock that can be powered down, providing the system designer with increased flexibility. The VSC8140 also incorporates a loss of signal (LOS) input and a 19.44MHz output clock for enhanced interoperability with optical modules. For testability and use in ring architectures, looptiming and three modes of loopback are available. The VSC8140 meets Bellcore jitter performance specifications and needs only a single 3.3V power supply. "The VSC8140 moves the 2.5Gb/s PHY layer products to the next level of reduced space, power and cost," continued Keeton. "By providing multiplexing, demultiplexing, and clock generation in one device, the design engineer enjoys peak performance to cost ratios," concluded Keeton. The VSC9111 and VSC8140 ICs are both 3.3V single supply devices. This reduces the overall power requirement and minimizes thermal management issues. System implementation is further simplified by the use of the same supply rail for the entire chipset. "Vitesse has a long track record of producing volume quantities of 2.5Gb/s SONET compliant integrated circuits with our GaAs process that meet the stringent demands of SONET jitter specifications, with margin to spare," stated Sandefur. "By continuing to use low-cost H-GaAs for high speed components and by using CMOS (Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes. on the low speed side, we can provide our customers with chipsets that deliver the optimum combination of high performance, low power and low cost," concluded Sandefur. These chipsets are designed to work with industry standard optoelectronic transceiver modules. They are also compatible with the extensive Vitesse line of 2.5Gb/s laser and optical modulator driver ICs designed for custom and WDM optical links. Pricing for the V-FRAME 2.5/SLT chipset is $332 in quantities of 1,000. The two ICs are also available individually. The VSC9111 uses a single 3.3V supply and is delivered in a 352 BGA thermally enhanced package. Pricing for the VSC9111 is $177 in quantities of 1,000. The VSC8140 also uses a single 3.3V supply and is packaged in a low cost 128 pin PQFP (Plastic Quad Flat Package) Refers to many varieties of QFP chip packages, which are molded in plastic. See QFP. and is $155 in quantities of 1,000. Vitesse Semiconductor is a world leader in the design, development, manufacturing and marketing of high bandwidth communications and Automatic Test Equipment (ATE) integrated circuits (ICs). The company's products address the needs of telecommunications, data communications and ATE equipment manufacturers who demand a combination of high speed, high complexity and low power dissipation. Vitesse has headquarters in Camarillo, and manufactures volume ICs at its two fabrication facilities in Camarillo and Colorado Springs. Company/product information can be found on the Web at www.vitesse.com. |
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