Vitesse's New V-FRAME 2.5 Chipset Family Makes 2.5Gb/s Communications Simple and Cost Effective.

CAMARILLO, Calif.--(BUSINESS WIRE)--Aug. 25, 1998--

Initial Framer and Multiplexing Chipsets Target ATM Applications;

More Telecom and Datacom Solutions to follow.

Vitesse Semiconductor Corp. (Nasdaq:VTSS) Tuesday announced the introduction of the V-FRAME 2.5 family of chipsets, which include all the data framing, multiplexing and demultiplexing functions required to build a complete 2.5Gb/s Physical Layer (PHY) for ATM and SONET/SDH communications equipment.

With the introduction of V-FRAME 2.5, Vitesse extends its reach from high-speed multiplexers to cover adjacent protocol control and framer functions. The V-FRAME 2.5 family features the industry's first standard products to completely integrate 2.5Gb/s ATM over SONET at the user network interface (UNI) and network node interface (NNI).

The 3.3V chipset makes 2.5Gb/s ATM a practical alternative to today's slower systems by dramatically reducing the cost, power, board space and development time required by 2.5Gb/s ATM line card equipment.

The first chipset in the family, designated V-FRAME 2.5/ATM, includes the VSC9110, a 2.5Gb/s ATM UNI IC; the VSC8163, a 16:1 2.5Gb/s multiplexer with integrated clock multiplication unit (CMU); and its companion chip, the VSC8164, a 1:16 2.5Gb/s demultiplexer.

This 3.3V IC chipset is the industry's first product to provide a UTOPIA-3 ATM Cell Interface and deliver a serialized 2.5Gb/s data stream ready for optical SONET/SDH transmission. The same chipset takes a serialized 2.5Gb/s SONET/SDH data stream and delivers the ATM cells to the UTOPIA interface in the receive path.

The UTOPIA-3 interface allows for point-to-point connections between the PHY layer and the ATM layer, with built-in options for the definition of the UTOPIA flow control signals. On the ATM side, the VSC9110 provides a fully compliant UTOPIA-3 interface, which is the industry standard for interfacing between the PHY layer and the ATM layer.

The VSC9110 implements the transmission of an ATM data stream over a concatenated OC-48c/STM-16c link. All related requirements are met, as defined by Bellcore GR-253, ANSI T1.105, ITU-T G.707 and the ATM Forum 2.4Gbps Physical Layer Specification. The device performs SONET/SDH framing functions and terminates SONET/SDH section, line and path overhead.

The ATM cells are transported in the payload envelope. A built-in ATM cell FIFO provides clock synchronization and buffering between the ATM layer and the SONET/SDH transport mechanism. The device is configured and monitored via a standard parallel CPU interface, and extensive performance monitoring and diagnostic functions are available.

The VSC9110 features multiple loopback modes, including line and equipment side loopback at the SONET/SDH frame level, and loopback at the ATM cell level. Also included is an industry-standard 5-line JTAG boundary scan interface.

The VSC8163 is a 16:1 2.5Gb/s multiplexer with integrated clock multiplication unit. It complies with SONET/SDH jitter requirements and only needs a single 3.3V power supply. The VSC8164 is the companion 1:16 demultiplexer for the VSC8163. It also only needs a 3.3V power supply.

"The 3.3V makes these chips compatible with existing CMOS technology at the system level, making the design process much easier for our customers," stated Gregory Borodaty, telecom product marketing manager for Vitesse.

The unique 3.3V supply for the VSC9110, VSC8163 and VSC8164 ICs compares with many of the industry's 622Mb/s UNIs and 2.5Gb/s multiplexers and demultiplexers that are 5V devices.

The lower overall power requirement reduces switch system thermal complications due to the close confinement of multiple line and switch cards. System implementation is further simplified by the use of the same supply rail for the entire chipset.

The V-FRAME holds the distinction of being Vitesse's first 2.5Gb/s chipset to include a CMOS component. Barry Sandefur, director of ATM Products at Vitesse, stated: "Vitesse has a long track record of producing volume quantities of 2.5Gb/s SONET-compliant multiplexers and demultiplexers. Our GaAs process meets the stringent demands of SONET jitter specifications, with margin to spare.

"To date, no CMOS technology has demonstrated that capability. By continuing to use GaAs for high-speed components and by using CMOS on the low-speed side, we can provide our customers with chipsets that deliver the optimum combination of high performance, low power and low cost."

V-FRAME 2.5/ATM is the first in a series of ATM and SONET PHY chipsets that Vitesse expects to introduce in the first quarter of 1999. "Various 2.5Gb/s ATM and Packet Over SONET (POS) applications require a variety of feature sets in the framer ICs," continued Sandefur.

"We are finding a commonality between the needs of our datacom and our telecom customers -- both groups require our 2.5Gb/s GaAs technology. Now we are developing a family of high-performing and cost-effective framer devices that address a wide range of emerging 2.5Gb/s applications.

"This chipset simplifies the design process since the required capability of the PHY is included in these three ICs, which are compatible and easy to integrate," concluded Sandefur.

The VSC9110 has been developed in conjunction with a major ATM equipment manufacturer, which has already taken delivery of prototype devices.

General sampling of the V-FRAME 2.5/ATM chipset is slated for January 1999, with production quantities available soon after. Samples of the individual multiplexer and demultiplexer ICs will also be available at that time.

Additional chipsets to be announced in the next six months include V-FRAME 2.5/POS for 2.5Gb/s POS datacom and telecom applications; V-FRAME 2.5/QPA for quad 622Mb/s POS and ATM into 2.5Gb/s SONET applications; and V-FRAME 2.5/SLT for complete 2.5Gb/s ATM/SONET section and line termination.

Each chipset includes a dedicated UNI IC and a compatible mux/demux pair, providing a three-chip implementation of the desired 2.5Gb/s PHY. These chipsets are designed to work with industry- standard opto-electronic transceiver modules.

They are also compatible with the extensive Vitesse line of 2.5Gb/s laser and optical modulator driver ICs designed for custom and wavelength division multiplexing (WDM) optical links.

Pricing for the V-FRAME 2.5/ATM chipset is $644 in quantities of 1,000. The three ICs are also available individually. The VSC9110 uses a single 3.3V supply and is delivered in a 256 BGA thermally enhanced package.

Pricing for the VSC9110 is $419 in quantities of 1,000. Both the VSC8163 and the VSC8164 are packaged in low-cost 128 pin PQFPs. The VSC8163 is $130 in quantities of 1,000, and the VSC8164 is $95 in quantities of 1,000.

Also available is an evaluation board that features the three ICs in the V-FRAME 2.5/ATM chipset included in a complete 2.5Gb/s duplex PHY reference design.

This subsystem is configured as a daughter card mounted on a CPU-based evaluation system, which is also available from Vitesse.

Vitesse Semiconductor is a world leader in the design, development, manufacturing and marketing of high-bandwidth communications and automatic test equipment (ATE) integrated circuits (ICs). The company's products address the needs of telecommunications, data communications and ATE manufacturers that demand a combination of high speed, high complexity and low power dissipation.

Vitesse corporate headquarters is in Camarillo, with its second fabrication facility in Colorado Springs, Colo., currently producing volume supplies of ICs. Company/product information can be found on the Web at www.vitesse.com.

CONTACT: Vitesse Semiconductor Corp.

Patricia Ito, 805/388-3700

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CMC Public Relations

Caroline Melnicoff, 650/324-8819

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