Printer Friendly
The Free Library
14,636,034 articles and books
Member login
User name  
Password 
 
Join us Forgot password?

Virage Logic and Tensilica Team to Deliver Technical Webinar on Core-Optimized IP Kits for Accelerated Silicon Success.


Free IP Kits Target Performance or Power Requirements for a Greater Competitive Advantage

SANTA CLARA Santa Clara, city, Cuba
Santa Clara (sän`tä klä`rä), city (1994 est. pop. 217,000), capital of Villa Clara prov., central Cuba.
, Calif. & FREMONT, Calif. -- Virage Logic Corporation (NASDAQ NASDAQ
 in full National Association of Securities Dealers Automated Quotations

U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on
:VIRL VIRL Vancouver Island Regional Library
VIRL Violation of Internal Revenue Laws
), the semiconductor industry's trusted IP partner and pioneer in Silicon Aware IP[TM], today announced that it will partner with Tensilica to present a free online technical webinar titled "Optimize for Performance or Power with Tensilica and Virage Logic Core-Optimized IP Kits." The live webinar will be broadcast via TechOnLine on Wednesday, January 24, 2007, at 11:00 a.m. PST PST Paroxysmal supraventricular tachycardia, see there  and 2:00 p.m. EST P.M. also p.m. or p.m.
abbr.
post meridiem

Usage Note: By definition, 12 a.m.
. Registration and information about the free, one-hour webinar is available at http://seminar2.techonline.com/s/viragegr8_jan2407.

Join this informative webinar to learn how customers can utilize easy, instant access to a series of jointly developed Core-Optimized IP Kits that are specifically tuned for each of the Tensilica Diamond cores, allowing designers to optimize for performance or power requirements that can help deliver a greater competitive advantage and shorten time-to-market. The Core-Optimized IP Kits target Tensilica's Diamond Standard processors, a set of six off-the-shelf synthesizable cores that range from area-efficient, low-power controllers to an audio processor and a high-performance DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive , all of which lead the industry in their respective categories both in lowest power and highest performance. The Core-Optimized IP Kits provide access to Virage Logic's silicon proven embedded Inserted into. See embedded system.  memory IP and standard cell libraries to meet a variety of market requirements.

"As the industry's trusted IP partner, Virage Logic is pleased to jointly provide our mutual customers with physical IP that is tuned to optimize the performance of Tensilica's Diamond Standard product line processor cores," stated Ken Potts, vice president of product marketing at Virage Logic. "By making the Core-Optimized IP Kits easily available on our website, this solution helps our customers to accelerate their silicon success."

"We are pleased to work with Virage Logic to provide customers with physical IP optimized for our Diamond Standard processors," said Steve Roddy, vice president of marketing at Tensilica. "With the introduction of the Core-Optimized IP Kits, we expect to help deliver a greater competitive advantage to our customers."

About Virage Logic Corporation

Founded in 1996, Virage Logic Corporation (NASDAQ:VIRL) rapidly established itself as a technology and market leader in providing advanced embedded memory intellectual property (IP) for the design of complex integrated circuits Integrated circuits

Miniature electronic circuits produced within and upon a single semiconductor crystal, usually silicon. Integrated circuits range in complexity from simple logic circuits and amplifiers, about 1/20 in. (1.
. Today, as the semiconductor industry's trusted IP partner, the company is a global leader in IP platforms comprising embedded memories, logic, and I/Os, and is pioneering the development of a new class of IP called Silicon Aware IP[TM]. Silicon Aware IP tightly integrates Physical IP (memory, logic and I/Os) with the embedded test, diagnostic, and repair capabilities of Infrastructure IP to help ensure manufacturability and optimized yield at the advanced process nodes. Virage Logic's highly differentiated product portfolio provides higher performance, lower power, higher density and optimal yield to foundries, integrated device manufacturers See IDM.  (IDMs) and fabless customers who develop products for the consumer, communications and networking, handheld and portable, and computer and graphics markets. The company uses its FirstPass-Silicon[TM] Characterization Lab for certain products to help ensure high-quality, reliable IP across a wide range of foundries and process technologies. The company also prides itself on providing superior customer support and was named the 2006 Customer Service Leader of the Year in the Semiconductor IP Market by Frost & Sullivan. Headquartered in Fremont, California For the unincorporated community in Yolo County, California, see .
Fremont (IPA: /ˈfriːmɒnt/) is a city in California that was incorporated on January 23, 1956, from the merger of five smaller communities:
, Virage Logic has R&D, sales and support offices worldwide. For more information, visit www.viragelogic.com.

About Tensilica

Tensilica offers the broadest line of controller, CPU CPU
 in full central processing unit

Principal component of a digital computer, composed of a control unit, an instruction-decoding unit, and an arithmetic-logic unit.
 and specialty DSP processors on the market today, in both an off-the-shelf format via the Diamond Standard Series cores and with full designer configurability with the Xtensa processor family. Tensilica's low-power, benchmark proven processors have been designed into high-volume products at industry leaders in the digital consumer, networking and telecommunications markets. All Tensilica processor cores are complete with a matching software development tool environment, portfolio of system simulation models, and hardware implementation tool support. For more information on Tensilica's patented approach to the creation of application-specific building blocks for SOC design, visit www.tensilica.com.

Safe Harbor Safe Harbor

1. A legal provision to reduce or eliminate liability as long as good faith is demonstrated.

2. A form of shark repellent implemented by a target company acquiring a business that is so poorly regulated that the target itself is less attractive.
 Statement for Virage Logic under the Private Securities Litigation Reform Act The Private Securities Litigation Reform Act of 1995 (PSLRA) implemented several significant substantive changes affecting certain cases brought under the federal securities laws, including changes related to pleading, discovery, liability, class representation and awards fees and  of 1995:

This press release includes forward-looking statements forward-looking statement

A projected financial statement based on management expectations. A forward-looking statement involves risks with regard to the accuracy of assumptions underlying the projections.
 intended to qualify for the safe harbor from liability established by the Private Securities Litigation Reform Act of 1995. The statements made in this news release, other than statements of historical fact, are forward-looking statements. Forward-looking statements are subject to a number of known and unknown risks and uncertainties, which might cause actual results to differ materially from those expressed or implied by such statements. These risks and uncertainties include Virage Logic's ability to maintain its position as a leading provider of semiconductor IP; Virage Logic's ability to continue to develop new products and develop new relationships with third-party foundries and integrated device manufacturers; adoption of Virage Logic's technologies by semiconductor companies; competition in the market for semiconductor IP platforms; statements regarding the business outlook and products; statements regarding the extent and timing of future revenues and expenses and customer demand; statements made by industry analysts relating to relating to relate prepconcernant

relating to relate prepbezüglich +gen, mit Bezug auf +acc 
 the possible benefit to Virage Logic's leadership in embedded memory technology; and other risks including those described in the company's Annual Report on Form 10-K Form 10-K

A report required by the SEC from exchange-listed companies that provides for annual disclosure of certain financial information.


Form 10-K

See 10-K.
 for the period ended September 30, 2006, and in Virage Logic's other periodic reports filed with the Securities and Exchange Commission or the SEC, all of which are available from Virage Logic's website (www.viragelogic.com) or from the SEC's website (www.sec.gov). Virage Logic does not intend, and undertakes no obligation, to update any forward-looking statements made in this news release.

All trademarks are the property of their respective owners and are protected herein.
COPYRIGHT 2007 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2007, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

 Reader Opinion

Title:

Comment:



 

Article Details
Printer friendly Cite/link Email Feedback
Publication:Business Wire
Date:Jan 18, 2007
Words:952
Previous Article:The Dutch Government Adopts MedRisk's Instrument for Measuring Patient Satisfaction.
Next Article:MySpace Celebrates First Anniversary of Film Community with Events at Park City Film Festivals.(Company overview)
Topics:



Related Articles
Virage Logic and Discretix Present a Technical Webinar on Robust, Reliable, Low-Cost Security Solutions.
Virage Logic and Cadence Join to Present Technical Webinar on Advanced Design Methodology for Low-Power Applications; Industry Leaders Provide...
Virage Logic and MIPS Technologies Introduce New Core-Optimized IP Kits for MIPS32(R) 24K(R), 24KE(TM) and 34K(TM) Core Families in 90nm G Process.
Dr. Yervant Zorian Wins IEEE's Hans Karlsson Award for Technical Leadership and Achievement Through Collaboration.
Virage Logic and Apache Design Solutions Team to Present Technical Webinar on Low-Power Design.
Virage Logic and MIPS Technologies Present Technical Webinar for Embedded Consumer Applications.
Virage Logic and MIPS Technologies Collaborate to Offer Core-Optimized IP Kits for MIPS32(R) 24K(R), 24KE(TM) and 34K(TM) Core Families Via...
Virage Logic and Tensilica Introduce Core-Optimized IP Kits for Tensilica's Diamond Standard Processors.
Virage Logic to Present Technical Webinar on Next-Generation Embedded Non-Volatile Memory.
Virage Logic DAC Program Features Advanced IP Solutions for 45nm & 65nm, Low Power, DFY/DFM and Yield Acceleration.

Terms of use | Copyright © 2009 Farlex, Inc. | Feedback | For webmasters | Submit articles