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Verplex Doubles Formal Verification Speed; Announcement of Conformal Equivalence Checker Sets New Performance and Usability Standards for Formal Verification.


Business & Hi-Tech Editors

MILPITAS, Calif.--(BUSINESS WIRE)--Aug. 27, 2001

Verplex(TM) Systems, Inc. announces its next generation in equivalence checking with Conformal(TM) Logic Equivalence Checker, which has on average twice the speed of its predecessor, Tuxedo LEC (1) (LAN Emulation Client) A software driver that provides LAN emulation (LANE) in an ATM network. It resides in an ATM end station or in a computer system that provides the LAN to ATM conversion, often known as a LAN access device. See LANE. .

Conformal combines increased performance and capacity with ease of use for the rapid and more reliable formal verification of full-chip designs. It compares register transfer level (RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; ) code to flattened netlists for multi-million gate designs in minutes or hours, setting new performance standards for formal verification.

"We are impressed that Verplex continues to stay ahead of the competition with proactive enhancements to meet the growing needs of their customers," says Hiroshi Furukawa, formal verification engineer, First SOC Department of NEC (NEC Corporation, Tokyo, www.nec.com, www.necus.com) An electronics conglomerate known in the U.S. for its monitors. In Japan, it had the lion's share of the PC market until the late 1990s (see PC 98).

NEC was founded in Tokyo in 1899 as Nippon Electric Company, Ltd.
 Micro Systems in Japan. "The 30 percent and up to 10X improvement in speed with the added ease of use in Conformal's new word level diagnostic capabilities significantly puts it even further ahead of all other verification tools."

With this new version of its equivalence checker, Verplex, on average, doubles the speed capability of its equivalence checking predecessor while adding numerous features. Conformal's new RTL compiler reduces the complexity of the overall verification process, and abstracts designs to a higher level for faster design comparisons. Improved comparison solvers enable designs to be verified 2X-10X faster.

Conformal is also tightly integrated with Verplex's SPICE to logic abstraction tool, Transformal(TM) Transistor Extractor, to verify RTL designs against their final LVS LVS Linux Virtual Server
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LVS Las Vegas, New Mexico (Airport Code)
LVS Low Voltage Switchgear
LVS Logistical Vehicle System
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 netlist. This is critical because the transistor-level netlist is the golden reference for physical design tools and for Customer-Owned Tooling (COT) flows.

Conformal has further optimized the comparison of RTL to gate multipliers, making them 10X-50X faster according to customer feedback. It automatically abstracts complex multiplier structures from synthesis design libraries generated by Synopsys Inc. (Nasdaq: SNPS SNPS Space Nuclear Power System ) DesignWare, and Cadence Design Systems (company) Cadence Design Systems - A company that sells electronic design automation software and services.

http://cadence.com/.

See also Verilog.
 Inc. (NYSE NYSE

See: New York Stock Exchange
: CDN (Content Delivery Network) A system of distributed content on a large intranet or the public Internet in which copies of content are replicated and cached throughout the network. ) Ambit Ware. Vendor specific multipliers from LSI LSI: see integrated circuit.


(Large Scale Integration) Between 3,000 and 100,000 transistors on a chip. See SSI, MSI, VLSI and ULSI.
 Logic Corporation (NYSE: LSI) and Texas Instruments (TI) Incorporated (NYSE: TXN) are now supported. Full adders used within multipliers are automatically recognized, which helps to speed up the comparisons process. The new Conformal also supports Verilog2000 signed operator and attributes to stay current with hardware description language (language) Hardware Description Language - (HDL) A kind of language used for the conceptual design of integrated circuits. Examples are VHDL and Verilog.  (HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. ) constructs.

Improved navigation techniques allow users to view schematic representations of functional blocks with bussed data and control distinction. This feature aids during debug and last-minute engineering change orders (ECOs), especially with large, complex designs. Additional GUI features and enhanced TCL support expand its diagnostic capabilities.

Mapping algorithms have been improved to further enhance ease of use.

A new mixed-language mode operation is well suited for system on chip (SOC) design applications, as well as designing with intellectual property (IP) written in VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction.  or Verilog.

Applications with different design styles can utilize Conformal's advances in sequential capability for gated-clocks, pipeline retiming, state encoding and cloned registers. The support of User Defined Primitives (UDPs) has been enhanced to enable users to verify complex state element requirements in their designs.

"Conformal's advanced foundation extends Verplex's lead over the competition in equivalence checking," concludes C. Michael Chang, president and chief executive officer of Verplex. "By continuing to push the performance and quality envelope, Verplex is delivering tools and technologies necessary to take verification to the next level."

Conformal Logic Equivalence Checker is available today and supports Hewlett Packard, Sun Microsystems and Linux operating systems platforms. It is priced at $105,000 U.S. pricing.

For more information on Conformal Logic Equivalence Checker and Transformal Transistor Extractor, contact Ralph Sanchez, Verplex product marketing manager, at (503) 835-9403 or via email at ralph@verplex.com.

About Verplex

Verplex Systems Inc. is an electronic design automation (EDA) company focusing on delivery of the highest speed, highest capacity and easiest to use formal verification products for complex system-on-chip (SOC) design. Founded in 1997, it is privately held and funded by leading venture capital firms Name Location Founding date Managing Partners/Directors Specialty Capital managed
5AM Ventures Menlo Park, CA; Waltham, MA 2002 John Diekman, PhD (managing partner), Scott Rocklage, PhD (managing partner), Andrew Schwab (managing partner) life sciences $200M [1]
. Corporate headquarters is located at 300 Montague Expressway, Suite 100, Milpitas, Calif. 95035. Telephone: (408) 586-0300. Facsimile: (408) 586-0230. Email: info@verplex.com. Online information is found at its web site: http://www.verplex.com.

Verplex, Tuxedo, BlackTie, Conformal and Transformal are trademarks of Verplex Systems Inc. All other companies and products referenced herein are trademarks or registered trademarks of their respective holders.
COPYRIGHT 2001 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2001, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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