Verific Welcomes Tenison as Latest Customer.ALAMEDA, Calif. -- Verific Design Automation today announced that Tenison Design Automation, a company focused on removing the barriers to ESL (1) An earlier family of client/server development tools for Windows and OS/2 from Ardent Software (formerly VMARK). It was originally developed by Easel Corporation, which was acquired by VMARK. adoption, has licensed its hardware description language (language) Hardware Description Language - (HDL) A kind of language used for the conceptual design of integrated circuits. Examples are VHDL and Verilog. (HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. ) Component Software. Verific's VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. parser and static elaborator are utilized as the front end for Tenison's newly announced VTOC (Volume Table Of Contents) A list of files on a disk. The VTOC is the mainframe counterpart to the FAT table on a PC. VTOC - Volume Table Of Contents VHDL/mixed language product. By licensing Verific's technology, Tenison was able to extend VTOC synthesis quickly to understand the complex structures of VHDL as well as the currently supported Verilog. Tool developers taking advantage of Verific's front end compiler technology are able to get to market earlier with an already proven parsing/elaboration technology. "We are committed to increasing our customers' profitability through software solutions that accelerate system design," remarks Jeremy Bennett, chief technology office (CTO (Chief Technical Officer) The executive responsible for the technical direction of an organization. See CIO and salary survey. ) of Tenison Design Automation. "Verific's HDL Component Software was instrumental in us being able to more quickly support our customer's needs." "Tenison is an innovative company providing products to accelerate ESL adoption," adds Michiel Ligthart, chief operating officer Chief Operating Officer (COO) The officer of a firm responsible for day-to-day management, usually the president or an executive vice-president. (COO) at Verific. "We're pleased to partner with Tenison in its vision and customer needs." About Verific Design Automation Verific Design Automation was founded in 1999 by electronic design automation (EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. ) industry veteran Rob Dekker. It develops and sells C++ source code-based SystemVerilog, Verilog and VHDL front ends -- parsers, analyzers and elaborators -- as well as a generic hierarchical netlist database for EDA applications. Verific's technology has been licensed in many applications, combined shipping more than 45,000 end-user copies. Corporate headquarters is located at: 1516 Oak Street, Suite 115, Alameda, Calif. 94501. Telephone: (510) 522-1555. Facsimile number: (510) 522-1553. Email: info@verific.com. Website: http://www.verific.com. About Tenison Tenison products provide the cornerstone for bridging the Model Gap in ESL design. Its' products span from 'concept-to-delivery' for synthesizing RTL into models at higher levels of abstraction for system level design. Customers include ST Microelectronics, Conexant Systems, Samsung, Ricoh, Renesas, Skyworks Solutions and other Fortune 100 companies. For more information, please visit www.tenison.com. Verific Design Automation acknowledges trademarks or registered trademarks of other organizations for their respective products and services. |
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