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VIA Technologies Expands Deployment of Novas Debug Platform for Implementation Analysis.


Business Editors/High-Tech Writers

SAN JOSE San Jose, city, United States
San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850.
, Calif.--(BUSINESS WIRE)--March 29, 2004

VIA Utilizes Advanced Debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits.  Capabilities to Cut Chip Development

Cycles And Improve the Implementation Design Flow

Novas Software Novas Software was founded in 1996 by Dr. Paul Huang to address the ongoing problem of debugging chip designs. Since then, Novas has grown to employ over 130 people with office locations across the world including Texas, New Hampshire, the United Kingdom, Japan, Korea, India, , Inc., the leader in debug systems for complex chip designs, today announced that VIA Technologies, Inc., a leading innovator and developer of silicon chip technologies and PC platform solutions, has expanded deployment of Novas as its preferred debug solution with the purchase of Novas' complementary nECO(TM) graphical netlist modification tool. The integration of nECO is targeted at accelerating development of VIA's advanced logic chipsets, microprocessors, and multimedia and communications chips.

VIA has been using Novas debug products since 1997 with more than 100 licenses deployed throughout their global design organization. VIA engineers will use nECO in combination with Novas' industry-leading Debussy(R) Debug System to cut by at least one-third the time required to implement and track engineering change orders.

"As the largest independent supplier of AMD's CPU CPU
 in full central processing unit

Principal component of a digital computer, composed of a control unit, an instruction-decoding unit, and an arithmetic-logic unit.
 chipsets, time-to-market is exceedingly critical," said Alan Liaw, assistant vice president of R&D Division for VIA. "Saving time is a top priority for our engineers, especially during the final stages of development when extra cycles could mean missing schedules. Novas provides a level of automation that is not available with other debug tools, and their debug platform is an integral part of our advanced verification methodology."

"VIA engineers are power tools users at the leading-edge of circuit design, and they need to be able to find and fix problems fast," said Johnson Teng, vice president of Asia Operations for Novas. "Improving productivity of these valuable engineering resources is the primary job for debug at VIA. We appreciate the market leader's continued confidence in Novas, and look forward to expanding the integration of our solutions within their chip development flow."

Streamlined ECO E·co   , Umberto Born 1932.

Italian writer best known for his novels, including The Name of the Rose (1981). He has also written extensively on semiotics and British and American popular culture.
 Process

Engineering changes can be tedious and error-prone because the netlists for today's ICs and systems-on-chip (SoCs) are large, complex, unfamiliar and hard to understand. Often, these changes come late in the design process when mistakes are very costly. With Novas' Debussy and nECO, engineers can quickly isolate relevant logic and propagate changes throughout the design hierarchy and generate updated hardware description language (language) Hardware Description Language - (HDL) A kind of language used for the conceptual design of integrated circuits. Examples are VHDL and Verilog.  source code. Netlists can be modified and automatically annotated all within the Novas debug environment, and changes output in script format to drive physical design tools. This saves valuable engineering time and reduces the likelihood of introducing new errors in the process.

About Novas

Novas is the pioneer of debug systems that reduce the functional verification Functional verification, in electronic design automation, is the task of verifying that the logic design conforms to specification. In everyday terms, functional verification attempts to answer the question "Does this proposed design do what is intended?" This is a complex task,  costs for complex integrated circuit integrated circuit (IC), electronic circuit built on a semiconductor substrate, usually one of single-crystal silicon. The circuit, often called a chip, is packaged in a hermetically sealed case or a nonhermetic plastic capsule, with leads extending from it for  and system-on-chip designs. Its market-leading Verdi(TM) and Debussy(R) Debug Systems, along with the Reusner(TM) Design Knowledge Publisher, go far beyond waveforms to help engineers understand and analyze complex or unfamiliar design behavior and share design knowledge across global organizations. Novas' debug tools cut by half or more the time it takes to locate, isolate and solve the root causes of design and verification problems. For two consecutive years, Novas has received the highest ranking for customer satisfaction in a comprehensive EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board.  study published by CMP CMP (cytidine monophosphate): see cytosine.


(1) (CMP Media LLC, Manhasset, NY, www.cmp.com) Part of United Business Media, CMP is a leading integrated media company that offers a wide variety of publications and services in the information
 with more than 10,000 systems installed worldwide and 30 EDA companies utilizing Novas technology in their products today. Novas is headquartered in San Jose, Calif. with offices in Europe, Japan and Asia-Pacific. For more information, visit http://www.novas.com or send email to info@novas.com.

About VIA Technologies

VIA Technologies, Inc. is the foremost fabless supplier of market-leading core logic chipsets, low power x86 processors, advanced connectivity, multimedia, networking and storage silicon, and complete platform solutions that are driving system innovation in the PC and embedded markets. Headquartered in Taipei, Taiwan, VIA's global network links the high tech centers of the US, Europe and Asia, and its customer base includes the world's top OEMs, motherboard vendors and system integrators. VIA is listed on the Taiwan Stock Exchange Taiwan Stock Exchange (TSEC)

Established in 1961, the only centralized securities market in Taiwan.
 (TSE See Tokyo Stock Exchange.

TSE

1. See Tokyo Stock Exchange (TSE).

2. See Toronto Stock Exchange (TSE).
:2388) and achieved annual revenues of over US$720 million in 2002. http://www.via.com.tw.

Debussy is a registered trademark, and nECO and Verdi are trademarks of Novas Software, Inc. All other trademarks or registered trademarks are the property of their respective owners.
COPYRIGHT 2004 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2004, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Date:Mar 29, 2004
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