TriCN's PCI Express PHY Verified Using Denali PureSpec Verification IP; Analysis Proves TriCN Functionality Within Full PCI Express Environment.Business Editors/High-Tech Writers Design Automation Conference 2004 Booth #839 SAN FRANCISCO--(BUSINESS WIRE)--June 7, 2004 TriCN, a leading developer of intellectual property (IP) for high-speed semiconductor interface technology, today announced the successful verification of its PCI Express A high-speed peripheral interconnect from Intel introduced in 2002. Note that although sometimes abbreviated "PCX," PCI Express is not the same as "PCI-X" (see PCI-SIG and PCI-X for comparison). As a result of the confusion, "PCI-E" or "PCIe" is the accepted abbreviation. PHY See physical layer and physical. using Denali Software's PureSpec(TM) Verification IP, the industry's most widely adopted verification solution for PCI Express. PureSpec's analysis verifies that TriCN's PCI Express PIPE macro is fully functional within a complete PCI Express environment, including Link Level Controller, Root Complexes, Bridges and Switches. "We are pleased to have our PCI Express PHY verified by the PureSpec Verification IP," said Ron Nikel, co-founder and Chief Technology Officer of TriCN. "As High Performance Interface Specialists, TriCN applies a system level approach to all of our interface development, which has resulted in a tremendous track for customer success. Verification of our PCI Express PHY through use of PureSpec is another important validation of the TriCN design methodology." "We've worked with TriCN on numerous high-speed interface designs and we continue to be impressed with their technical expertise and commitment to customer success," said David Lin, VP Denali. "TriCN has developed a robust design and verification methodology. We are very pleased that PureSpec is delivering value in their verification flow, and helps enable a very high-quality end-product." About TriCN's PCI Express PHY TriCN PCI Express PHY is a fully PIPE (1.0a) compliant hard macro The design of a logic function on a chip that specifies how the required logic elements are interconnected and specifies the physical pathways and wiring patterns between the components. Also called a "macro cell." Contrast with soft macro. solution which includes the SerDes, the PIPE logic and the I/Os, and provides the industry's most efficient design for area and power. Supporting all lane configurations of the PCI Express spec, (X1, X2, X4, X8, X16, X32), TriCN's offering includes a true X1 solution. The PHY is delivered as a hard macro requiring no further RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; synthesis, significantly reducing engineering time and risk over comparable solutions with soft IP components. Availability TriCN's PCI Express PHY products are immediately available in the TSMC TSMC Taiwan Semiconductor Manufacturing Company, Ltd TSMC Taiwan Semiconductor Manufacturing Corporation TSMC Traffic Systems Management Center TSMC Toll Station Management Controller TSMC Transportation Supply Maintenance Command TSMC Technical Services Manager Code 130nm process. About Denali PureSpec Verification IP Used in over 40 PCI Express chip designs, PureSpec is the most widely used verification IP solution for simulating and verifying PCI Express design interfaces. PureSpec models all devices in the PCI Express topology, including the root complex, switch, endpoint, and PCI Express to PCI (1) (Payment Card Industry) See PCI DSS. (2) (Peripheral Component Interconnect) The most widely used I/O bus (peripheral bus). bridge. Within PureSpec, all protocol layers (physical, data link, transaction) of the PCI Express specification are completely modeled and can be simulated concurrently or independently. The product contains thousands of assertions that are monitored during simulation to ensure compliance with the PCI Express specification, and interoperability with other PCI Express devices. PureSpec provides seamless integrations An addition of a new application, routine or device that works smoothly with the existing system. It implies that the new feature or program can be installed and used without problems. Contrast with "transparent," which implies that there is no discernible change after installation. to all popular EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. tools and verification languages, and is available for customer evaluation at www.denali.com/purespec. About Denali Software Denali Software, Inc. is an American software company, based in Palo Alto, California. The company produces electronic design automation (EDA) software and intellectual property (IP) design cores for memory and other standard interfaces. Denali Software Inc. is the world's leading provider of electronic design automation (EDA) tools and semiconductor intellectual property (SIP) solutions for chip interface design and verification. More than 400 companies worldwide use Denali's tools, technology, and services to design and verify complex chip interfaces for communication, consumer, and computer products. For more information, please visit Denali at www.denali.com or contact Denali directly at: 650-461-7200, or email: info@denali.com. About TriCN Founded in 1997, San Francisco San Francisco (săn frănsĭs`kō), city (1990 pop. 723,959), coextensive with San Francisco co., W Calif., on the tip of a peninsula between the Pacific Ocean and San Francisco Bay, which are connected by the strait known as the Golden , California-based TriCN is a leading developer of high- performance semiconductor interface intellectual property (IP). The company provides a complete portfolio of IP for maximizing data throughput on and off the chip. All products are designed using rigorous signal integrity and timing analysis to ensure first time power-up success. Products include Base I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output. I/O - Input/Output libraries for pad-ring creation, high-performance memory and networking interfaces, multi-function I/O's compatible with multiple interface protocols, and multi-gigabit PHY products. TriCN's customers range from fabless semiconductor to systems companies and IDMs. For more information, please visit TriCN's web site at www.tricn.com. TriCN: High Performance Interface Specialists(TM) |
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