Printer Friendly
The Free Library
5,672,661 articles and books
Member login
User name  
Password 
 
Join us Forgot password?

Transaction-Level Assertions Added to JEDA's Native SystemC Assertion Tools; Enables System Architects to Write Reusable Checkers at the System-Level.


LOS ALTOS Los Altos (lôs ăl`tōs, lŏs), residential city (1990 pop. 26,303), Santa Clara co., W Calif.; inc. 1952. There is diversified light manufacturing. , Calif. -- JEDA JEDA Jobs-Economic Development Authority (Myrtle Beach, SC, USA)
JEDA Joint Environmental Data Analysis
JEDA Joint Electronic Document Access
JEDA Joint Engine for Defense Analysis
 Technologies today announced the addition of Transaction-Level Assertions (TLA (Three Letter Acronym) The epitome of acronyms! While two-, four- and five-letter acronyms exist, there are more three-letter acronyms. Obviously, three words to describe a concept or product is the most popular.

TLA - Three-Letter Acronym
(TM)) capability to its NSCa(TM) (Native SystemC assertion) family of Native SystemC assertion-based verification automation tools. TLA gives system architects/engineers the ability to create assertion-based checkers at the transaction level.

NSCa, first released in February 2006, supported cycle-level assertions. "What we are doing is addressing the missing capabilities in SystemC by adding temporal expressions and assertions. With TLA, the verification flow from transaction level to cycle level is in place. We see TLA as an effective way to verify system-level models as well as a vehicle to assure system-level requirements are met throughout the design process," said Eugene Zhang, President and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board.  of JEDA Technologies.

NSCa is a comprehensive native SystemC assertion development and debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits.  environment for both the transaction-level and cycle-level design phases. NSCa enables a top-down verification process where the architect/systems engineer creates system-level checks that are used throughout the design and verification effort. This executable specification, written as assertions, ensures functional consistency as the design evolves from a system-level description through RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences;  implementation. These assertions give the verification engineer the ability to reuse and or refine these checks in a testbench environment to quickly find the root cause in a given design problem. Assertion-based testbenches readily pinpoint errors for more efficient debug.

Software developers also benefit from NSCa's use in their virtual prototyping design flow ensures the correctness of their models early in the design phase. During the hardware implementation phase it also helps them validate the consistency between their models and their hardware using the same NSCa codebase.

NSCa easily integrates into an existing SystemC environment. Users have a choice to write their assertion checks in one of three ways:

1) Using NSCa assertion macro's which are nothing but C++ macro that can be called directly in any SystemC or C++ functions inside

2) Using NSCa extended C++ syntax, a concise and compact assertions syntax that resembles the syntax of SystemVerilog Assertions and or PSL 1. PSL - Portable Standard Lisp.
2. PSL - Problem Statement Language. See PSL/PSA.
 

3) Using the language independent API to interface a user-specific front end or C++ codebase

NSCa syntax are few and concise resulting in a 4 to 10x coding efficiency compared to writing assertions directly in SystemC, thus requiring far less code to write and maintain. In addition, NSCa includes a powerful assertion IDE (integrated development environment See IDE.

integrated development environment - interactive development environment
), an assertion debug environment and assertion coverage and tracing tools. At the cycle-level, the NSCa syntax is very similar to the SVA SVA School of Visual Arts
SVA Severe (Thunderstorm) Advisory
SVA Statens Veterinärmedicinska Anstalt (National Veterinary Institute, Sweden)
SVA Shareholder Value Added
 (SystemVerilog Assertion) syntax or PSL

One of the deficiencies of existing RTL assertion standards is that they do not address the transaction-level. The transaction level is where the systems architect defines the system architecture and specifies the system's performance goals and requirements.

Advanced Assertion Coverage

NSCa includes assertion coverage and advanced assertion path coverage capabilities that record coverage of each possible assertion branch.

Assertion path coverage measures the effectiveness of an assertion description while assertion coverage measures testbench quality.

Experienced Team

The JEDA founding team, Eugene Zhang, CEO; Atsushi Kasuya CTO (Chief Technical Officer) The executive responsible for the technical direction of an organization. See CIO and salary survey.  and Chief Architect; and Teshager Tesfaye, Director of Product Development are the core team that invented Vera at Sun in 1993. Atsushi was the author of all of the original Vera patents. This is the third generation of verification automation tools developed by the JEDA team. The Los Altos team is augmented by a development team in Beijing, China.

About JEDA Technologies

JEDA Technologies, founded in 2002, is the "System-Driven Verification Automation Company" focused on providing automation tools for SystemC based designs. The founding team invented Vera when they were at Sun Microsystems Sun Microsystems, Inc. (NASDAQ: JAVA[3]) is an American vendor of computers, computer components, computer software, and information-technology services, founded on 24 February 1982. . The company is based in Los Altos, California Los Altos (IPA: [lɔs ɑltos]) is a city at the southern end of the San Francisco Peninsula, in the San Francisco Bay Area. The city is in Santa Clara County, California, United States.  with an additional development center in Beijing China. For more information, please visit www.jedatechnologies.com.

TLA, NSCa, JEDA and JEDA Technologies are trademarks of JEDA Technologies, Inc. All other tradenames and trademarks are the property of their respective owners.
COPYRIGHT 2006 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2006, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

 Reader Opinion

Title:

Comment:



 

Article Details
Printer friendly Cite/link Email Feedback
Publication:Business Wire
Date:Sep 5, 2006
Words:645
Previous Article:Books-A-Million, Inc. Announces Share Repurchase Program.
Next Article:Air Force Surgeon General's $75 Million Information Modernization Technology Services Contract Awarded to Karta Technologies, Inc.



Related Articles
OPEN SYSTEMC INITIATIVE DELIVERS SYSTEMC V2.0 SPECIFICATION AND V1.2 BETA OPEN SOURCE CODE.(Product Announcement)
Cadence Delivers Verification Productivity Boost for Complex SOC Designs Through Commitment to Industry Standards.
CoWare Launches New Modeling Solution for Platform-Driven ESL Design.
Industry's First Native SystemC Assertion-Based Verification Automation Tools; Assertions Utilize the Full Power of C++.
JEDA Donates OCP Checker To OCP-IP; Uses JEDA's NSCa Native SystemC Assertions.
JEDA Technologies to Integrate SystemC Verification Automation Tools with CoWare.
CoWare and Tenison Accelerate Creation of Virtual Hardware Platforms for Architectural Exploration and Software Development.
JEDA Brings Key Verification Technologies To SystemC.
Avery Design Systems Announces Support for PCI Express IO Virtualization and AMBA AXI.
Sonics and JEDA Technologies Deliver ESL Validation.

Terms of use | Copyright © 2009 Farlex, Inc. | Feedback | For webmasters | Submit articles