Toshiba discloses SoCMosaic custom chip IT co-development strategy.

Toshiba America Electronic Components, Inc. (TAEC) has announced details of its SoCMosaic custom chip hardware/software (HW/SW) co-development strategy designed to help software engineers developing code for an SoCMosaic custom chip significantly reduce software development time by as much as one year. The company further announced that it has selected the WhiteEagle Systems Technology SwordFish Emulation Platform, an FPGA emulation solution, and the Mentor Graphics Corporation Seamless Version 5 co-verification tool as its first two co-development environments.

"Our SoCMosaic custom chip HW/SW co-development strategy builds on our SoCMosaic custom chip fast, time-to-market approach for IP-rich custom SoCs. We believe we've come up with a new way of bringing the time savings and cost efficiencies of HW/SW co-development to our SoCMosaic custom chip customers," said Richard Tobias, vice president of the ASIC and Foundry Business Unit at TAEC. "We provide a development environment that is a front end to a variety of simulation modes with an application programming interface that further abstracts the models, making them all look the same to the software. In short, our SoCMosaic custom chip software design flow ties all the tools together seamlessly and lets our customers start software development right away." Mr. Tobias noted that the SwordFish Emulation Platform from WhiteEagle was designed from the ground up specifically for the SoCMosaic custom chip program while Seamless from Mentor Graphics provides a proven, rich co-verification environment.

"As the industry's leading hardware/software co-verification environment, we value Toshiba's selection of the Mentor Graphics Seamless technology for its SoCMosaic custom chip strategy," said Serge Leef, general manager of Mentor Graphics SoC Verification division. "Collaboration with Toshiba to tailor the Seamless solution for SoCMosaic custom chip provides a leading-edge co-verification environment for our mutual customers who are designing the next-generation communications and digital consumer products."

Compared to conventional approaches, the SoCMosaic custom chip HW/SW co-development environment allows software development to begin as much as one year sooner. In addition, this method helps ensure working first silicon; customers avoid the cost and delay of chip re-spins due to bugs that could have been found using simulation. Customers can run their complex software on the SoC while it is in development, executing their code on a functional model, a mixed function/register-transfer level (RTL) model and an FPGA emulator that achieves ten percent of the clock speed of the final SoC. Software engineers can use the same programming and debugging environment throughout the entire process, from the C model all the way to the working end product.

"We are very pleased that Toshiba selected us to provide technology and services that assist their customers in achieving their SoCMosaic custom chip design goals," said William Wu, vice president of Hardware Engineering at WhiteEagle Systems Technology. "Our approach of extending the SoCMosaic custom chip standardized bus interface on our system is capable of emulation speeds up to 40MHz and can model chips as large as 40 million gates. Additionally the emulation provides a huge benefit to the software development team by providing a development and verification platform long before the silicon is ready."

The SoCMosaic custom chip HW/SW co-development environment provides a front panel that allows software developers to work with different types of SoC simulation modes. Programmers use the SoCMosaic custom chip Platform Support Package (PSP) to develop their code which is independent of the simulation mode. The customer's software can be migrated seamlessly to any supported run-time environment, including functional model, mixed functional/gate model, FPGA, the T6TC1XB-0001 development board and the custom SoC. The PSP also provides a consistent run-time environment for C code. The environment supports a broad range of programming and debugging tools, including JTAG in-circuit emulator interfaces.

The WhiteEagle SwordFish Emulation System is a hardware box with an expandable emulation engine and a wide bandwidth host interface. Customizable I/O interface cards, design automation tools and host application software round out the product. The bundled EDA and host application software makes it easy to integrate the SwordFish Emulation System with existing design flows. This system is targeted for the customers of the SoCMosaic custom chip platform that want parallel development of software with hardware, and hardware verification with real time I/O in the early development phase.

The basic system includes the host interface hardware and the chassis that houses the backplane with a single blade of the emulation engine. The customer has the option to upgrade the speed and capacities of the FPGAs on each emulation blade, upgrade the system to contain multiple blades and request custom-built I/O cards.