Toshiba Tapes Out High-Performance ASSP With Synopsys DFT Compiler SoCBIST.Business Editors/High-Tech Writers MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Sept. 17, 2003 Deterministic Logic BIST BIST - Built-in Self Test Capability Reduces Test Cost for Multimillion-gate .13 Micron Design Synopsys, Inc. (Nasdaq:SNPS SNPS Space Nuclear Power System ), the world leader in semiconductor design software, today announced that Toshiba Corporation (company) Toshiba Corporation - A Japanese technology manufacturer with 364 subsidiaries worldwide. Toshiba makes and sells electronics for home, office, industry and health care including information and communication systems, electronic components, heavy electrical apparatus, , a world leading semiconductor manufacturer, has taped out Refers to the completion of the design of a chip. The next stage is to put it into production. The term comes from the early days when designs were transferred to the fabricator via magnetic tape. a high-performance digital image processor chip targeting consumer multimedia applications using Synopsys DFT DFT - discrete Fourier transform Compiler(TM) SoCBIST's deterministic logic BIST capability. This six million gate device was designed using Toshiba's advanced TC280 0.13 micron process. By partnering with Synopsys to extend their design-for-test (DFT) flow for next-generation LSI LSI: see integrated circuit. (Large Scale Integration) Between 3,000 and 100,000 transistors on a chip. See SSI, MSI, VLSI and ULSI. designs, Toshiba reduced overall test cost by taking advantage of SoCBIST's ability to deliver a 10-times reduction in tester time and more than 100 times reduction in test data volume. "We partnered with Synopsys on our DFT flow, and DFT Compiler SoCBIST enabled us to reduce tester time for our upcoming LSI design by 12 times and test data volume by 900 times as compared to traditional methodologies," said Seiichi Nishio, senior manager design methodology, Toshiba Corporation Semiconductor Company. "We are very pleased with the results we achieved with SoCBIST on our upcoming LSI design. We expect to tape out multiple designs using SoCBIST before the end of the year, and will continue to work with Synopsys to develop advanced transition test and next-generation DFT methodologies." In its design flow, Toshiba uses Design Compiler(R), DFT Compiler SoCBIST, Physical Compiler(R), PrimeTime(R), and TetraMAX(R) ATPG ATPG Automatic Test Pattern Generation ATPG Automatic Test Program Generator from Synopsys' Galaxy Design Platform. Because DFT Compiler SoCBIST is an integral part of Galaxy, Toshiba is able to achieve its overall design objectives and achieve DFT closure smoothly and efficiently within the same flow. "We rely on Toshiba as one of our technology partners and driving customers in the area of manufacturing test," said Antun Domic, senior vice president and general manager, Synopsys Implementation Group. "Toshiba provided key guidance to Synopsys on their requirements in test quality, cost and diagnostics, and has built a very impressive production methodology and design flow that fully and effectively utilizes SoCBIST's capabilities. We look forward to our continued collaboration with Toshiba and to advancing robust and production-ready manufacturing test methods for their next-generation products." About Galaxy Design Platform The Galaxy Design Platform is an open, integrated design The introduction to this article provides insufficient context for those unfamiliar with the subject matter. Please help [ improve the introduction] to meet Wikipedia's layout standards. You can discuss the issue on the talk page. implementation platform with best-in-class tools, enabling advanced IC design. Anchored by Synopsys' industry-leading IC implementation tools and the open Milkyway(TM) database, the Galaxy Design Platform incorporates consistent timing, SI analysis, common libraries, delay calculation, and constraints from RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; all the way to silicon. The Galaxy Design Platform helps reduce design time, decreases integration costs and minimizes the risks inherent in advanced, complex IC design. Synopsys Galaxy Test Automation Solution Synopsys' Galaxy Test Automation solution, within the Galaxy Design Platform, offers a comprehensive family of products for mainstream to high-performance semiconductor designs. The award-winning solution includes the advanced DFT Compiler, TetraMAX ATPG and DFT Compiler SoCBIST products. The Galaxy Test Automation solution incorporates capabilities that enable designers to achieve DFT closure and sign off on the testability of their mainstream ASICs, as well as reduce test cost and time and data volume for their most complex designs. Galaxy Test offers a standards-based test automation solution for core-based design that speeds the creation, integration, and verification of test reuse-ready IP. About Synopsys Synopsys, Inc. (Nasdaq:SNPS) is the world leader in electronic design automation (EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. ) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms to the global electronics market, enabling the development of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California For the census-designated place, see Mountain View, Contra Costa County, California. For other places called "Mountain View", see . Mountain View is a city in Santa Clara County, in the U.S. state of California. The city gets its name from the views of the Santa Cruz Mountains. and is located in more than 60 offices throughout North America North America, third largest continent (1990 est. pop. 365,000,000), c.9,400,000 sq mi (24,346,000 sq km), the northern of the two continents of the Western Hemisphere. , Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/. Synopsys, Design Compiler, Physical Compiler, PrimeTime, and TetraMAX are registered trademarks of Synopsys, Inc., DFT Compiler, MilkyWay, and Galaxy are trademarks of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners. |
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