Toshiba Releases 0.14-micron SLI ASIC Libraries With Embedded DRAM; Highest-Density, 125Kgate/mm2 Libraries Include New Families of Application-Specific DRAM Cores.SAN JOSE, Calif.--(BUSINESS WIRE)--June 28, 1999-- Toshiba America Electronic Components, Inc. (TAEC TAEC Toshiba America Electronic Components, Inc. TAEC Thailand Atomic Energy Commission ) today makes available its 0.14-micron (um) drawn system-level integration (SLI) ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. family featuring embedded DRAM in standard and application-specific DRAM cores. The company's TC260 ASIC family utilizes the industry's highest-density interconnect, gate, SRAM See static RAM. SRAM - static random-access memory and I/O structures to achieve the smallest die sizes. The family is targeted for applications such as networking, set-top boxes and computer peripherals that require cost-effective manufacturing. TC260 is also ideal for systems above 150 megahertz (MHz), over 2.5 million gates (Mgates) or those requiring the lowest power dissipation. Toshiba also announced that three new families of application-specific embedded dRAMASIC(TM) cores -- high-bandwidth, fast-access and compact -- have been added to the existing standard core offering to address specific requirements of networking, computer peripheral and digital consumer applications. (Please see separate announcement on the application-specific DRAM cores.) TC260 dRAMASIC and TDF for a Complete Solution Toshiba's dRAMASIC embedded DRAM, 0.14 um process, and Timing-Driven Flow (TDF(TM)) design methodology are flagship technologies of the company's SLI strategy to help customers achieve their performance specifications and meet production goals. "Toshiba's new TC260 SLI ASIC family and DRAM cores result from many years of embedded DRAM SLI application experience. We've taken the latest process technology and added Timing-Driven Flow, application-specific DRAM cores, and an extensive library of IP, including RISC RISC in full Reduced Instruction Set Computing Computer architecture that uses a limited number of instructions. RISC became popular in microprocessors in the 1980s. cores, to create a complete solution," stated Peter Richmond, director of SLI business development at TAEC. "The system-level integration (SLI) market or system-on-a-chip (SOC) market is expected to grow from $9 billion in 1998 to over $24 billion by 2002," said Bryan Lewis, director and principal analyst of GartnerGroup's Dataquest ASIC/SLI service, San Jose, California San Jose (IPA: /ˌsænhoʊˈzeɪ/) is the third-largest city in California, and the tenth-largest in the United States. It is the county seat of Santa Clara County. . "Our studies indicate that increasing functionality, reducing cost, and reducing time to market are the three most critical issues facing today's system designers."(1) Advanced SLI Technology Toshiba's TC260 utilizes 0.14 um, six-layer-metal process technology to achieve a combination of high density and high speed. Industry-leading density results from a combination of 125K usable gates/mm2 (based on a typical mix of 40 percent flip-flop gates and 60 percent logic); 0.44/0.56 um metal pitch; space-saving narrow or short I/O cells; and a compact SRAM macrocell that measures only 4.2 um2 per cell. A widely-used measure of speed, 2-Input NAND gate delay, is only 36 picoseconds with 10ps input slew, a fan-out of two and estimated wire-length loads. The family includes standard cells for best density or embedded arrays for fastest development turnaround time (TAT). Toshiba's trench capacitor technology permits mixing of logic and DRAM without degrading logic performance. In addition, two technology module options are available -- a 2.5 volt (V) Precision-Analog Module for mixed-signal applications, and a Performance Module for optimizing challenging timing paths. For low power dissipation, a 1.5V power supply is used for the core logic, and I/O options are 1.8V, 2.5V, and 3.3V. As a result, typical power dissipation for a 36mm2 die operating at 200MHz is only 2.0 watts. TC260 dRAMASIC Cores With the addition of new application-specific dRAMASIC cores, Toshiba offers a broad selection of embedded memory for the 0.14 um TC260 family. The new TC260 fast-access, low-latency dRAM cores have a random access time (tRC) of only 30ns and are available in 1-megabit (Mb) to 4Mb densities, 32 bits wide in one, two, or four banks. The TC260 high-bandwidth cores are specified from 2Mb to 32Mb, configured 64 to 256 bits wide in one, two or four banks, and run at 200MHz. Toshiba's dRAMASIC products offer significant advantages over off-chip memory solutions including the flexibility to configure the DRAM macrocell to application requirements, high bandwidth due to wide and fast memory buses, better granularity than discrete DRAMs, and significantly lower power consumption due to lower-capacitance on-chip connections. With typical TC260 die sizes of 62mm2 with a 32Mb embedded DRAM core and 500K logic gates, or a 128mm2 for an 64Mb embedded DRAM core with 1.5Mgates, TC260 allows memories to be combined with enough logic for a true SLI design. IP Libraries In addition to the embedded memory cores, Toshiba's IP library includes an ever-growing selection of internally developed or partner-developed IP cores. These include MIPS (Million Instructions Per Second) The execution speed of a computer. For example, .5 MIPS is 500,000 instructions per second; 100 MIPS is a hundred million instructions per second. (R) RISC and ARM(R) processor cores, as well as basic cells such as RAM, ROM, register files, UARTS UARTS Unmanned Air Reconnaissance & Targeting System , A/D A/D See advance-decline line (A/D). , D/A D/A See: Documents Against Acceptance , and PLL up through application-specific I/Os and cores such as PCI (1) (Payment Card Industry) See PCI DSS. (2) (Peripheral Component Interconnect) The most widely used I/O bus (peripheral bus). , USB USB in full Universal Serial Bus Type of serial bus that allows peripheral devices (disks, modems, printers, digitizers, data gloves, etc.) to be easily connected to a computer. , IrDA, IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields. 1394, 10/100 Ethernet, ATM, ADSL See DSL. ADSL - Asymmetric Digital Subscriber Line , MPEG (Moving Pictures Experts Group) An ISO/ITU standard for compressing digital video. Pronounced "em-peg," it is the universal standard for digital terrestrial, cable and satellite TV, DVDs and digital video recorders (DVRs). , QPSK (Quadrature Phase Shift Keying) A phase modulation technique that transmits two bits in four modulation states. See PSK and phase modulation. , QAM, SCSI, and Gigabit/Fiberchannel. Packaging and Availability Packaging options include high-pin-count, high-performance flip-chip Ball Grid Array “BGA” redirects here. For other uses, see BGA (disambiguation). A ball grid array (BGA) is a type of surface-mount packaging used for integrated circuits. (BGA), low-cost tape BGA and fine-pitch BGA packages. The TC260 SLI ASIC family is also available in many other standard packages and pin counts. Toshiba is actively soliciting design-ins now, with prototypes available in late 1999 and volume production in Q199. About TAEC Toshiba America Electronic Components, Inc. (TAEC) is the North American engineering, manufacturing, marketing and sales arm of Toshiba Semiconductor Company and Display Devices and Components Company. TAEC is recognized as one of the world's largest suppliers of semiconductor, electronic component and storage solutions. Toshiba's Semiconductor Company is one of the world's leading manufacturers and suppliers of semiconductor products including LSIs, microprocessors and controllers, and advanced memory products, in addition to discrete and bipolar components. The company is also responsible for global sales and marketing of other major electronic components including liquid crystal displays, color display and picture tubes, lithium-ion and other secondary batteries. Note to Editors: MIPS is a registered trademark of MIPS Technologies, Inc. ARM is a registered trademark of ARM Limited. TDF and dRAMASIC are trademarks of Toshiba Corporation. ASIC-99-221 Reader inquiries please publish 800/879-4963, ext. 221 |
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