Toshiba Develops Industry's First 64Mb Read While Write NOR Flash Memory Device.

IRVINE, Calif.--(BUSINESS WIRE)--March 2, 2000

High-Density Component With Read While Write (RWW) Functionality

Ideal for Cellular Phones and Hand-Held Devices

Toshiba America Electronic Components Inc. (TAEC), Thursday announced that Toshiba Corp. has developed the industry's first 64 megabit (Mb) Read While Write (RWW) NOR flash memory device.

The TC58FVT/B641 NOR flash memory device, targeted for use in cellular phones, wireless and hand-held consumer devices, and set top boxes, provides the flexibility and capacity required for emerging full-featured applications.

"Cellular phones are evolving to incorporate additional features and multimedia capabilities that require more memory," said Kevin Kilbuck, senior business development manager, memory business unit for TAEC.

"This 64Mb NOR provides the density to support these new features, and its Read While Write functionality enables cellular phone manufacturers to eliminate a separate EEPROM chip previously required to store telephone numbers, names and other parameters."

A RWW NOR flash device is essentially two or more flash memory arrays on a die. One array can be used to store data while code is executed from another array. In this device, Toshiba achieved greater system design flexibility by using a 17-bank architecture that allows reading from any other bank not in use for writing/reading operations.

The device is organized with one 64 kilobyte (kB) bank, one 448kB bank, and 15 512kB banks. Top and bottom boot block architectures are available with a block size of 8kB x 8.

The 64Mb RWW NOR flash memory device features one of the industry's smallest memory cell sizes, which enables reduction in die size, cost, package size and power consumption. This small memory cell is achieved using Toshiba's shallow trench cell design, 0.20 micron (um) process technology and the company's Scalable by Design(TM) approach.

Like Toshiba's other NOR flash devices, the 64Mb RWW device provides automatic algorithms for programming, block erasure and chip erasure to ensure that data is properly programmed and erased. Additional functions include erase suspend as well as erase resume and block protection to prevent accidental programming or erasure of the protected block.

Toshiba's new high-density TC58FVT/B641 64Mb NOR RWW are encased in 48-pin TSOP Type I packaging. The device operates with a 2.7 volt (V) single power supply, which meets the low-power requirements of portable equipment.

Toshiba's NOR flash memory line also includes a 16Mb device and the company plans to sample a 32Mb RWW device in Q2'00. As a leading developer of both NAND and NOR flash, Toshiba understands the unique advantages associated with each architecture.

By offering both architectures, TAEC is positioned to serve a vast array of growing NOR flash applications requiring higher densities, lower power and faster access times, while continuing as a market leader in NAND flash for use in solid state storage applications.

Pricing and Availability

Samples of Toshiba's TC58FVT/B641 64Mb TSOP device will be available at the end of March 2000, priced at $60 each. Production quantities will be available in April 2000, and production pricing will be available at that time.

Technical Specifications

Part Number         TC58FVT641                TC58FVB641
Design Rule         0.20 um                   0.20 um
Operating Voltage   VCC=2.7 to 3.6V           VCC=2.7 to 3.6V
Access Time         100 nanoseconds (ns)      100 ns
Package Type        48-pin TSOP Type I RWW    48-pin TSOP Type I RWW
Boot Block          Top                       Bottom

About Scalable by Design

Scalable by Design represents Toshiba's commitment to future technologies and is supported by its modular design approach that enables easier and less expensive transition to the next process generation or memory density. To make the most efficient use of the company's wafer fabrication facilities, Toshiba's memory products have been designed for scalability.

By harnessing advances from the trench cell-based 256Mb DRAM development project and applying them to the 64Mb and 128Mb densities, Toshiba can seamlessly scale five generations from 0.35um to 0.13um with one clean room. The result is smooth and predictable transitions, simplified qualifications and rapid cycling of process and products.

With these technological innovations deployed and the hurdles overcome at 0.35um geometry, only a modest 10 percent added investment is required for each successive microlithography refinement. Toshiba is also carrying these same principles forward in its other memory products including NAND Flash memory.

About Toshiba

Toshiba America Electronic Components Inc. (TAEC) is the North American engineering, manufacturing, marketing and sales arm of Toshiba Semiconductor Company and Display Devices and Components Company. TAEC is recognized as one of the world's largest suppliers of semiconductor, electronic component and storage solutions.

Toshiba's Semiconductor Company is one of the world's leading manufacturers and suppliers of semiconductor products including LSIs, microprocessors and controllers, and advanced memory products, in addition to discrete and bipolar components.

The company is also responsible for global sales and marketing of other major electronic components including liquid crystal displays, color display and picture tubes, lithium-ion and other secondary batteries. For additional information, please visit TAEC's Web site at, http://www.toshiba.com/taec.

Note: Scalable by Design is a trademark of Toshiba America Electronic Components Inc.

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