Toshiba Develops High Performance Microprocessor Core; 'MeP-h1'is World's First 1GHz Configurable Processor.Tokyo, Japan, Aug 17, 2005 - (JCN JCN Japan Corporate News JCN Journal of Cognitive Neuroscience JCN Journal of Cardiovascular Nursing JCN Journal of Christian Nursing JCN Job Control Number JCN Journal of Child Neurology JCN joint communications network (US DoD) Newswire) - Toshiba Corporation (company) Toshiba Corporation - A Japanese technology manufacturer with 364 subsidiaries worldwide. Toshiba makes and sells electronics for home, office, industry and health care including information and communication systems, electronic components, heavy electrical apparatus, today announced that it has developed a new high-end processor core, MeP-h1, the first configurable microprocessor to achieve a 1GHz clock speed. The MeP-h1 is based on Toshiba's "Media embedded Processor The Media embedded Processor (MeP) is a configurable 32-bit processor design from Toshiba Semiconductor for embedded media processing applications. External links
The performance of the new core was boosted by increasing the number of instruction execution pipeline stages to nine, from five in Toshiba's previous processor core. The new core is also optimized for design of high-performance customized processors by integration of a reorder re·or·der v. re·or·dered, re·or·der·ing, re·or·ders v.tr. 1. To order (the same goods) again. 2. To straighten out or put in order again. 3. To rearrange. v. buffer circuit that manages and shortens waiting cycles for user extension instructions. The present implementation of the core was manufactured with 65nanometer (nm) process technology, and that too contributed to achieving the 1GHz clock speed. The new configurable processor core is designed with register transfer level description (RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; ) and can be manufactured with other process technology, including 90nm technology. The details of the processor and its technology were announced today (August 16, local time) at HOT CHIPS17, the international processor conference that opened at Stanford University Stanford University, at Stanford, Calif.; coeducational; chartered 1885, opened 1891 as Leland Stanford Junior Univ. (still the legal name). The original campus was designed by Frederick Law Olmsted. David Starr Jordan was its first president. on August 14. Development Background The market for digital equipment supporting images, audio and communications is growing fast. However, the required performance and type of data processing data processing or information processing, operations (e.g., handling, merging, sorting, and computing) performed upon data in accordance with strictly defined procedures, such as recording and summarizing the financial transactions of a in system LSI LSI: see integrated circuit. (Large Scale Integration) Between 3,000 and 100,000 transistors on a chip. See SSI, MSI, VLSI and ULSI. differs by application, and the overall volume of handled data is rapidly increasing. As a result, there is growing demand for customizable high-performance embedded processors. Toshiba will continue to develop MeP technology and to apply high-end gigaherz-level MeP cores to SoC for digital products. Outline of MeP MeP is a configurable processor that allows designers to customize processor configurations, including custom instructions and embedded memory capacity, in about 1 million different combinations. The processor features small chip size, low power consumption and high-speed processing. It is based on a 32-bit RISC processor RISC processor [Reduced Instruction Set Computer], computer arithmetic-logic unit that uses a minimal instruction set, emphasizing the instructions used most often and optimizing them for the fastest possible execution. , appropriate for digital media products that require processing of large volume of image and audio data, such as digital TVs and DVD recorders. MeP Main Features 1. High-speed media processing See media control. (image and audio) 2. Customizable configuration, including embedded-memory capacity 3. Extensibility of hardware allowing easy addition of functions These features contribute to shorter development times for SoC that integrate complicated functions, reducing the development time for digital products. Toshiba uses MeP in its own products and also licenses the technology to third parties that require flexibility in circuit design. Users who want to apply MeP to their own products can download MeP design data and related information from Toshiba's dedicated website, http://www.MePcore.com/, after registration and completing a license agreement. Roadmap of MeP Toshiba developed its first MeP core, MeP-c1 which had a 5-stage pipeline structure in 2001. Toshiba expanded MeP functionality, creating its line of c-series products, with the MeP-c2 and MeP-c3. The new core announced today, MeP-h1, introduces a 9-stage pipeline structure as the first core in the new high-performance h series. Toshiba is also developing MeP-c4, an enhanced c-series core. Copyright [c] 2005 JCN Newswire. All rights reserved. A division of Japan Corporate News Network K.K. |
|
||||||||||||||||

Printer friendly
Cite/link
Email
Feedback
Reader Opinion