Toshiba Develops 8Mb Low-Power SRAM Device and Industry's First 8Mb SRAM/64Mb NOR Flash Stacked MCP Memory Device.

Business Editors and High-Tech Writers

IRVINE, Calif.--(BUSINESS WIRE)--March 9, 2000

Smaller Form-Factor Packaging Combined With High-Density

Memory Solutions, Enable Advanced Features in

Cellular Phones and Hand-Held Devices

Toshiba America Electronic Components Inc. (TAEC), Thursday announced that Toshiba Corp. has developed a low-power 8-megabit (Mb) SRAM device, along with the industry's first 8Mb/64Mb NOR flash stacked multi-chip package (MCP) device using the most advanced processing technologies available for SRAM and NOR flash memories.

The TC55W800FT SRAM enables the design of full-featured, light-weight and smaller hand-held systems, while the TH50VSF3680/3681AASB stacked MCP device is emerging as the packaging solution of choice for cellular phone applications requiring smaller and lighter components.

"As a worldwide leader in memory and developer of multi-chip packaging solutions, we have aligned our low-power SRAM and NOR flash products with the wireless market," said Kevin Kilbuck, senior business development manager for TAEC's memory business unit.

"In response to the emergence of full-featured cellular phones requiring higher-density memory solutions, Toshiba is the first supplier to market with a full-CMOS 8Mb SRAM and a 64Mb read while write (RWW) NOR flash in a single, space-saving package."

Demand for SRAM and Flash is migrating to higher densities and smaller packaging in order to accommodate the latest applications and features such as Internet access, PDA capability and video and music transmission via the cellular phone network.

In cellular phone applications, low-power SRAM is utilized as the buffer/working memory, while NOR flash stores the program memory and user data such as names and phone numbers. By converting from a traditional 4-transistor, 2-resistor SRAM cell to a full-CMOS (6-transistor) cell, Toshiba has reduced the standby current significantly in order to increase battery life.

Toshiba's stacked MCP device combines 8Mb low-power SRAM and 64Mb NOR flash into one single space-saving stacked ball grid array (BGA) package solution. An innovative SRAM pin-out enables both devices to share address lines and eliminates the need for redundant address pins. The MCP device is packaged in a 56-signal BGA located on a 9x12 millimeter (mm) area with a 0.80mm ball pitch.

In addition to the upward migration capability realized by reducing redundant pins, the four center balls are not required and have been removed. This allows a maximum of two signals between any two adjacent balls, relaxing the printed circuit board (PCB) specifications and minimizing the layers.

Toshiba has enhanced its NOR flash memory offering by adding read while write (RWW) functionality to the 64Mb device. A RWW NOR flash device is essentially two or more flash memory arrays on one die eliminating the EEPROM. One array can be used to store data while code is executed from another array.

With this device, Toshiba has enabled greater system design flexibility by using a 17-bank architecture that allows reading from any other bank not in use for writing/reading operations. The device is organized with one 64 kilobyte (kB) bank, one 448kB bank, and 15 banks of 512kB. Top and bottom boot block architectures are available with block sizes of 8kB.

The 64Mb RWW NOR flash memory device features one of the industry's smallest memory cell sizes, which enables reduction in die size, cost, package size and power consumption. This small memory cell is achieved using Toshiba's shallow trench cell design, 0.20 micron (um) process technology and the company's Scalable by Design(TM) approach.

Like Toshiba's other NOR flash devices, the 64Mb RWW device provides automatic algorithms for programming, block erasure and chip erasure to ensure that data is properly programmed and erased. Additional functions include erase suspend as well as erase resume and block protection to prevent accidental programming or erasure of the protected block. The new device is compatible with the programming algorithms of AMD/Fujitsu and shares a common package type.

Toshiba's 8Mb low-power SRAM memory cell is achieved using 0.22um full-CMOS process technology using six transistor SRAM memory cells and is housed in a 48-pin TSOP Type I package as a discrete solution. The SRAM device has the same common pin locations as the 64Mb NOR flash memory device to enable the two devices to be stacked during assembly of the MCP. The 8Mb low-power SRAM is available in speeds up to 55 nanoseconds (ns).

Toshiba's new high-density, low-power stacked MCP device is encased in a 56-signal BGA package. The device operates with a 2.3 volt (V) to 3.0V SRAM power supply and a 2.7V to 3.6V Flash power supply, which meets the low-power requirements of cellular phones.

The company plans to sample a 32Mb NOR flash in April 2000 and offer this product along with its 4Mb/8Mb SRAM in various MCP configurations.

Pricing and Availability

Samples of Toshiba's TC55W800FT low-power SRAM are available now priced at $40. Production quantities will be available in April 2000 and production pricing will be available at that time. Samples of Toshiba's TH50VSF3680/3681AASB 8Mb SRAM and 64Mb NOR flash MCP will be available at the end of March priced at $95. Production quantities will be available June 2000, and production pricing will be available at that time.

Technical Specifications

Part Number            TC55W800FT              TH50VSF3680/3681AASB
Component Type         8Mb low-power SRAM      8Mb SRAM and 64Mb RWW
                                               NOR Flash
Design Rule            0.22 um                 0.22 um
Operating Voltage      VCC=2.3 to 3.0V         VCC(SRAM)=2.3 to 3.0V
                                               VCC(Flash)=2.7 to 3.6V
Access Time            55ns                    100ns
Package Type           48-pin TSOP Type I      56-signal BGA (9x12mm)

About Toshiba

Toshiba America Electronic Components Inc. (TAEC) is the North American engineering, manufacturing, marketing and sales arm of Toshiba Semiconductor Company and Display Devices and Components Company. TAEC is recognized as one of the world's largest suppliers of semiconductor, electronic component and storage solutions.

Toshiba's Semiconductor Company is one of the world's leading manufacturers and suppliers of semiconductor products including LSIs, microprocessors and controllers and advanced memory products, in addition to discrete and bipolar components.

The company is also responsible for global sales and marketing of other major electronic components including liquid crystal displays, color display and picture tubes, lithium-ion and other secondary batteries. For additional information, visit TAEC's Web site at, http://www.toshiba.com/taec.

Note: Scalable by Design is a trademark of Toshiba America Electronic Components Inc.

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